firtool-1.154.0

What's Changed

• [Arcilator] Support sim.proc.print with stream by @nanjo712 in #10778
• [ci] Bump manylinux version for Linux wheels by @seldridge in #10815
• [arcilator] Add target DLTI attribute to MLIR module by @fzi-hielscher in #10819
• [circt-bmc] handle 'verif.formal' / 'verif.contract' op in module by @Clo91eaf in #10772
• [ImportVerilog][Moore][MooreToCore] Add $readmemb/$readmemh support by @VecoMr in #10789
• [MooreToCore] Support bit-range extract on packed structs by @VecoMr in #10817
• [HWToLLVM] Use module's DLTI to determine !hw.union buffer size by @fzi-hielscher in #10823
• [MooreToCore] Fix crash on variable of unsupported type with initialiser by @VecoMr in #10822
• [MooreToCore] Support zero-init for aggregates without static bit width by @VecoMr in #10814
• [MooreToCore][Sim] Add lowering for moore.string_to_int by @VecoMr in #10824
• [RTG][Elaborator] Elaborate external ops with regions by @youngar in #10811
• [Moore] Fix VariableOp::getDefaultValue for packed types by @georgerennie in #10827
• [ImportVerilog] Support default clocking blocks and procedural sampled value functions by @georgerennie in #10826
• [MooreToCore] Legalize sim.queue as a target type to fix hierarchical queue refs by @VecoMr in #10821
• [Moore][MooreToCore][Sim] Add lowering for associative array operations by @VecoMr in #10820
• [SV] Fix verbatim.module getPortList indexing by @TaoBi22 in #10825
• [ArcRuntime][InsertRuntime] Improve handling of trace file paths by @fzi-hielscher in #10802
• [SystemC] Fix SCModuleOp getPortList argNum and direction by @TaoBi22 in #10831
• [ExportVerilog] Fix precedence of equality operators by @cathyzhyi in #10833
• [TableGen] Make dialect TableGen files self-contained by @ConvolutedDog in #10724
• [ImportVerilog] Support packed aggregate arguments to sampled value functions by @VecoMr in #10829
• [ExportVerilog] Emit LTL not(eventually(not(_))) as always by @fabianschuiki in #10840
• [MooreToCore] Support moore.concat_ref lowering by @VecoMr in #10816
• [ImportVerilog] Add real --parse-only, rename old to --import-only by @fabianschuiki in #10841
• [ImportVerilog] Support $itor, $rtoi, $pow system functions by @fabianschuiki in #10845
• [ImportVerilog] Fix operand domain for real logical operators by @fabianschuiki in #10842
• [ImportVerilog] Lower case statements on reals to real equality by @fabianschuiki in #10843
• Warn when FIRRTL needs and implicit truncation by @darthscsi in #10621
• [ImportVerilog] Support arrayed instances by unrolling elements by @fabianschuiki in #10846
• [MooreToCore] Lower moore.unreachable to llvm.unreachable by @fabianschuiki in #10844
• [Synth] Add SAT-based exact synthesis pass by @uenoku in #10493
• [OM] Handle signless OM integers in folding by @uenoku in #10812
• Bump LLVM by @uenoku in #10756
• [RTG] Add StringToASCIIArrayOp by @maerhart in #10849
• [circt-bmc] Add verif.bmc.trace for BMC counterexample value tracking by @5iri in #10747
• [Synth] Share SAT solver construction helper, NFC by @uenoku in #10862
• [Support][NFC] Remove IndexedMaxHeap in SATSolver.h by @uenoku in #10866
• [MooreToCore][Sim] Support lowering of unpacked array equality by @VecoMr in #10835
• verif: relax hardware-port check for simulation targets by @trmckay in #10851
• [FIRRTL][InferDomains] Colorless constant expr. by @seldridge in #10847
• [ExportVerilog] Don't align instance ports to over-long names by @dtzSiFive in #10870
• [ESI] Service requests: allow unstructured options by @teqdruid in #10871
• [PyCDE] Remove numpy build dependency by @teqdruid in #10874
• [AGENTS.md] Remove references to docker image by @uenoku in #10873
• [PyRTG] Adjust diagnostic handling to upstream changes by @maerhart in #10878
• [RTG] Add algebraic effect system (mut cells, handlers, continuations) by @youngar in #10828
• [ImportVerilog][MooreToCore] Incremental fixes for Ariane support by @AlviseDeFaveri in #10853
• [PyRTG] Add algebraic effects and handlers by @youngar in #10881
• [PyCDE] Re-add numpy, add its build dep by @teqdruid in #10882
• [ESI][Runtime] BSP: override the channel engine via option by @teqdruid in #10872
• [PyCDE][ESI] Introduce 'ChannelArbitrator' module by @teqdruid in #10883
• [ESI] Clarify documentation on window list num_items by @teqdruid in #10884
• [FIRRTL][InferDomain] Fix null pointer dereference by @uenoku in #10886
• [ESI] List support for HostMem service by @teqdruid in #10889
• [ESI] Allow additional verification on service reqs by @teqdruid in #10890
• [FIRRTL][InferDomains] Add skip-domain option to selectively skip domain checking by @uenoku in #10887
• [Datapath] Signed Multiplication via Booth Encoding by @cowardsa in #10867
• [circt-bmc] Lower BMC trace markers to runtime callbacks by @5iri in #10876
• [MooreToCore] Lower $realtobits/$bitstoreal/$shortrealtobits/$bitstoshortreal builtins to arith.bitcast by @VecoMr in #10864
• [Synth] Fix REQUIRES in a LEC test by @uenoku in #10901
• [AffineToLoopSchedule][NFC] Fix a deprecation warning by @uenoku in #10902

New Contributors

• @cathyzhyi made their first contribution in #10833
• @ConvolutedDog made their first contribution in #10724

Full Changelog: firtool-1.153.0...firtool-1.154.0