Build OpenSBI

.gitattributes

@@ -7,3 +7,4 @@ doc/img/memmap.svg linguist-generated=true
 doc/img/mocha.svg linguist-generated=true
 hw/top_chip/ip/xbar_peri/*/autogen/* linguist-generated=true
 hw/top_chip/ip_autogen/* linguist-generated=true
+sw/device/devicetree/mocha.S linguist-generated=true

flake.nix

@@ -87,6 +87,7 @@
         verible
         srecord
         d2
+        dtc
       ];
     in {
       formatter = pkgs.alejandra;

sw/CMakeLists.txt

@@ -15,4 +15,8 @@ enable_testing()
 
 set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 
+include(ExternalProject)
+
 add_subdirectory(device)
+
+include(cmake/opensbi.cmake)

sw/cheri_toolchain.cmake

@@ -46,7 +46,11 @@ string(CONCAT CMAKE_C_FLAGS_INIT
   " -Wall -Wextra"
 )
 
-set(CMAKE_ASM_FLAGS_INIT "")
+set(CMAKE_ASM_FLAGS_INIT
+    # Workaround: Our current build of the LLVM toolchain crashes
+    # when trying to erroneously relax the devicetree assembly file.
+    "-mno-relax"
+)
 
 set(CMAKE_EXE_LINKER_FLAGS_INIT
     "-nodefaultlibs"

sw/cmake/opensbi.cmake

@@ -0,0 +1,80 @@
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Function that builds OpenSBI with a specific payload for Mocha.
+function(mocha_opensbi_with_payload PAYLOAD_TARGET)
+  # find the target payload file.
+  set(PAYLOAD "$<TARGET_FILE:${PAYLOAD_TARGET}>.bin")
+  # name of the target OpenSBI build.
+  set(NAME opensbi_with_${PAYLOAD_TARGET})
+
+  # OpenSBI repository and tag to use.
+  set(OPENSBI_REPOSITORY https://github.com/lowrisc/opensbi)
+  set(OPENSBI_TAG mocha-devel)
+
+  # build command - run make with build options.
+  set(BUILD_COMMAND
+      make
+      # Use CHERI LLVM.
+      LLVM=1
+      # ISA options.
+      PLATFORM_RISCV_XLEN=64
+      PLATFORM_RISCV_ISA=rv64imac_zcherihybrid
+      PLATFORM_RISCV_ABI=l64pc128
+      # Build for the 'generic' platform, which uses devicetree data.
+      PLATFORM=generic
+      # Use the Mocha defconfig file.
+      PLATFORM_DEFCONFIG=mocha_defconfig
+      # Build a 'payload' firmware.
+      FW_PAYLOAD=y
+      FW_JUMP=n
+      # Build with the given payload.
+      FW_PAYLOAD_PATH=${PAYLOAD}
+      # Disable position-independent code and link to DRAM base,
+      # as loading position-independent executables is not supported by
+      # our Verilator ELF loader.
+      FW_PIC=n
+      FW_TEXT_START=0x80000000
+      # 0x2 bit = build with runtime debug printing.
+      FW_OPTIONS=0x2
+  )
+
+  # Built firmware binaries to copy into the root of the external project directory.
+  # These consist of OpenSBI + the provided payload for the next stage.
+  set(FIRMWARES
+      build/platform/generic/firmware/fw_payload.elf
+      build/platform/generic/firmware/fw_payload.bin
+  )
+
+  # install command - copy the firmware binaries to the root of the external project directory.
+  set(INSTALL_COMMAND
+      cp ${FIRMWARES} <INSTALL_DIR>
+  )
+
+  ExternalProject_Add(
+      ${NAME} PREFIX ${NAME}
+      GIT_REPOSITORY ${OPENSBI_REPOSITORY}
+      GIT_TAG ${OPENSBI_TAG}
+      # OpenSBI builds in its own 'build' sub-directory.
+      BUILD_IN_SOURCE true
+      # make is job server aware.
+      BUILD_JOB_SERVER_AWARE true
+      CONFIGURE_COMMAND "" # no configure step needed, do nothing here.
+      BUILD_COMMAND ${BUILD_COMMAND}
+      INSTALL_COMMAND ${INSTALL_COMMAND}
+      # depend on the given payload target.
+      DEPENDS ${PAYLOAD_TARGET}
+      # suppress output from stdout.
+      LOG_DOWNLOAD true
+      LOG_UPDATE true
+      LOG_PATCH true
+      LOG_CONFIGURE true
+      LOG_BUILD true
+      LOG_INSTALL true
+      LOG_MERGED_STDOUTERR true
+      LOG_OUTPUT_ON_FAILURE true
+  )
+endfunction()
+
+mocha_opensbi_with_payload(opensbi_test_payload)

sw/cmake/tests.cmake

@@ -49,7 +49,7 @@ macro(mocha_add_fpga_test NAME)
 endmacro()
 
 set(BOOT_CFG              rom                 bare        ) # Config Name
-set(BOOT_CFG_OFFSET       0x4000              0x00        ) # Offset
+set(BOOT_CFG_OFFSET       0x8000              0x00        ) # Offset
 set(BOOT_CFG_FPGA         YES                 NO          ) # Fpga supported?
 set(BOOT_CFG_VERILATOR    NO                  YES         ) # Verilator supported?
 

sw/device/bootrom/CMakeLists.txt

@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 set(NAME bootrom)
-add_executable(${NAME} bootrom.c)
+add_executable(${NAME} bootrom.c ../devicetree/mocha.S)
 target_link_libraries(${NAME} hal_vanilla runtime_vanilla startup_vanilla)
 target_compile_options(${NAME} PUBLIC ${VANILLA_FLAGS})
 target_link_options(${NAME} PUBLIC 

sw/device/bootrom/bootrom.c

@@ -6,6 +6,7 @@
 #include "builtin.h"
 #include "constants.h"
 #include "hal/gpio.h"
+#include "hal/hart.h"
 #include "hal/mocha.h"
 #include "hal/spi_device.h"
 #include "hal/uart.h"
@@ -17,7 +18,7 @@
 #define MINOR "01"
 #define PATCH "00"
 
-const uintptr_t boot_slots[] = { 0x10004000, 0x80000000 };
+const uintptr_t boot_slots[] = { 0x10008000, 0x80000000 };
 struct boot_context {
     uart_t console;
     gpio_t gpio;
@@ -28,6 +29,9 @@ struct boot_context {
 extern uint8_t _program_start[];
 extern uint8_t _program_end[];
 
+// Pointer to devicetree blob, defined in devicetree/mocha.S
+extern char dt_blob_start[];
+
 static bool spi_boot_strap(struct boot_context *ctx);
 static void page_program(uart_t console, spi_device_t spid, uint32_t offset, uint32_t bytes);
 static void boot(uintptr_t addr);
@@ -57,11 +61,10 @@ int main(void)
         spi_boot_strap(&boot_ctx);
     }
 
-    uint32_t boot_addr = 0;
-    while (!get_boot_addr(&boot_addr)) {
-        uprintf(boot_ctx.console, "Entering SPI bootstrap\n");
-        // Spin polling the spi_dev and processing incoming data until a reset command is received.
-        spi_boot_strap(&boot_ctx);
+    uint32_t boot_addr;
+    if (!get_boot_addr(&boot_addr)) {
+        uprintf(boot_ctx.console, "No valid slot found, default to DRAM\n");
+        boot_addr = dram_base;
     }
 
     uprintf(boot_ctx.console, "\nJumping to: 0x%x\n", boot_addr);
@@ -72,9 +75,12 @@ int main(void)
 
 void boot(uintptr_t addr)
 {
-    typedef void (*reset_handler_t)(void);
-    reset_handler_t reset = (reset_handler_t)addr;
-    reset();
+    /* next boot stages (OpenSBI, Linux, etc..) expect:
+     * - hart's hartid stored in the a0 register.
+     * - pointer to devicetree blob in the a1 register. */
+    unsigned long hartid = hart_hartid_get();
+    void (*next_stage)(unsigned long hartid, char *dtb) = (void *)addr;
+    next_stage(hartid, dt_blob_start);
 }
 
 bool get_boot_addr(uint32_t *addr)

sw/device/devicetree/REUSE.toml

@@ -0,0 +1,6 @@
+version = 1
+
+[[annotations]]
+path = ["mocha.S"]
+SPDX-FileCopyrightText = "lowRISC Contributors (COSMIC project)."
+SPDX-License-Identifier = "Apache-2.0"