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This replaces the 2 bool flags and the anonymous union. This also removes an implicit conversion from Register to unsigned and a call to MCRegister::id(). The ArgDescriptor constructor was always assigning the union through the MCRegister field even for stack offsets. The change to SIMachineFunctionInfo.h fixes a case where getRegister was being called on an unset ArgDescriptor. Since it was only this case, it seemed cleaner to fix it at the caller. The other option would be to make getRegister() return MCRegister() for an unset ArgDescriptor.
…bol checks (#167806) Currently we're picking up and complaining about builtin (and procedure) symbols like null() when defaultmap(none) is set, so I've relaxed the restriction a bit to allow for procedures and named constants to bypass the restriction. It might be the case that we want to tighten it up again in certain aspects in the future.
The ds_gws_* instructions require gds as an operand. However, when nogds is given, it is treated the same as gds. This patch fixes this to disallow nogds.
This was getting joined in ShutDownExcecptionThread (sic) but not cleared. So this function was not safe to call twice, since you aren't supposed to join a thread twice. Sadly, this was called in MachTask::Clear and MachProcess::Destroy, which are both called when you tell debugserver to detach. This didn't seem to cause problems IRL, but the most recent ASAN detects this as an error and calls ASAN::Die, which was causing all the tests that ran detach to fail. I fixed that by moving the clear & test for m_exception_thread to ShutDownExceptionThread. I also fixed the spelling of that routine. And that routine was claiming to return a kern_return_t which no one was checking. It actually returns a kern_return_t if there was a Mach failure and a Posix error if there was a join failure. Since there's really nothing you can do but exit if this fails, which is always what you are in the process of doing when you call this, and since we have already done all the useful logging in ShutDownExceptionThread, I just removed the return value.
…67939) Non-binary output files from the compiler need the `OF_Text` flag set for encoding conversion to be performed correctly on z/OS. --------- Co-authored-by: Tony Tao <tonytao@ca.ibm.com>
Solaris doesn't define RLIMIT_NPROC, so this is expected to fail there. This fixes a test failure in llvm/utils/lit/tests/verbosity.py on Solaris due to this unexpected warning being included in the lit output.
Effectively means we don't need to call into `llvmModule->convertFromNewDbgValues()` anymore. Added a flag to allow users to access the old behavior.
Addresses `TODO`s in file.cpp by replacing data copies via for loops with calls to inline_memcpy. Signed-off-by: Shreeyash Pandey <shreeyash335@gmail.com>
With this option we can pass to BOLT names of functions to be printed through a file instead of specifying them all on command line.
_Exit(3) is a fairly simple syscall wrapper whereas exit(3) calls atexit-registered functions + whole lot of stuff that require support for sync primitives. Splitting the tests allows testing the former easily (especially for new port projects) --------- Signed-off-by: Shreeyash Pandey <shreeyash335@gmail.com>
By only defining it if LIBC_ASSERT macro is not defined. Fixes #162392
RegisterId can represent a physical register, a MCRegUnit, or
an index into a side structure that stores register masks. These 3
types were encoded by using the physical reg, stack slot, and
virtual register encoding partitions from the Register class.
This encoding scheme alias wasn't well contained so
Register::index2StackSlot and Register::stackSlotIndex appeared
in multiple places.
This patch gives RegisterRef its own encoding defines and separates
it from Register.
I've removed the generic idx() method in favor of getAsMCReg(),
getAsMCRegUnit(), and getMaskIdx() for some degree of type safety.
Some places used the RegisterId field of RegisterRef directly as a
register. Those have been updated to use getAsMCReg.
Some special cases for RegisterId 0 have been removed as it can
be treated like a MCRegister by existing code.
I think I want to rename the Reg field of RegisterRef to Id, but
I'll do that in another patch.
Additionally, callers of the RegisterRef constructor need to be
audited for implicit conversions from Register/MCRegister
to unsigned.
This is needed when building with `LLVM_LINK_LLVM_DYLIB` to build LLVM as a DLL on Windows. This effort is tracked in #109483.
This patch adds the target hooks required by Instruction Referencing for the AArch64 target, as mentioned in https://llvm.org/docs/InstrRefDebugInfo.html#target-hooks Which allows the Instruction Referenced LiveDebugValues Pass to track spills and restore instructions. With this patch we can use the `llvm/utils/llvm-locstats/llvm-locstats.py` to see the coverage statistics on a clang.dSYM built with in RelWithDebInfo we can see: coverage with dbg_value: ``` ================================================= Debug Location Statistics ================================================= cov% samples percentage(~) ------------------------------------------------- 0% 5828021 38% (0%,10%) 127739 0% [10%,20%) 143344 0% [20%,30%) 172100 1% [30%,40%) 193173 1% [40%,50%) 127366 0% [50%,60%) 308350 2% [60%,70%) 257055 1% [70%,80%) 212410 1% [80%,90%) 295316 1% [90%,100%) 349280 2% 100% 7313157 47% ================================================= -the number of debug variables processed: 15327311 -PC ranges covered: 67% ------------------------------------------------- -total availability: 62% ================================================= ``` coverage with InstrRef without target hooks fix: ``` ================================================= Debug Location Statistics ================================================= cov% samples percentage(~) ------------------------------------------------- 0% 6052807 39% (0%,10%) 127710 0% [10%,20%) 129999 0% [20%,30%) 155011 1% [30%,40%) 171206 1% [40%,50%) 102861 0% [50%,60%) 264734 1% [60%,70%) 212386 1% [70%,80%) 176872 1% [80%,90%) 242120 1% [90%,100%) 254465 1% 100% 7437215 48% ================================================= -the number of debug variables processed: 15327386 -PC ranges covered: 67% ------------------------------------------------- -total availability: 60% ================================================= ``` coverage with InstrRef with target hooks fix: ``` ================================================= Debug Location Statistics ================================================= cov% samples percentage(~) ------------------------------------------------- 0% 5972267 39% (0%,10%) 118873 0% [10%,20%) 127138 0% [20%,30%) 153181 1% [30%,40%) 170102 1% [40%,50%) 102180 0% [50%,60%) 263672 1% [60%,70%) 212865 1% [70%,80%) 176633 1% [80%,90%) 242403 1% [90%,100%) 264441 1% 100% 7494527 48% ================================================= -the number of debug variables processed: 15298282 -PC ranges covered: 71% ------------------------------------------------- -total availability: 61% ================================================= ``` I believe this should be a good indication that Instruction Referencing should be turned on for AArch64?
Fixes: #166059 --------- Signed-off-by: Shreeyash Pandey <shreeyash335@gmail.com>
…167636) Add a new CMake variable, `LIBCXX_ASSERTION_SEMANTIC`, that largely mirrors `LIBCXX_HARDENING_MODE`, except that it also supports a special value `hardening_dependent` that indicates the semantic will be selected based on the hardening mode in effect: - `fast` and `extensive` map to `quick_enforce`; - `debug` maps to `enforce`.
Address post commit comments from #167958
Also add boilerplate to have a live instance when running opt configured from CommandFlags / TargetOptions.
This commit fixes the validation check for duplicate indices in the TOSA scatter operation when using int64 index tensors. Previously, use of int64 index tensors would cause a crash.
… vectors (#168055) When simplifying min/max intrinsics with fixed-size vector constants, InstructionSimplify attempts to optimize element-wise. However, getAggregateElement() can return null for certain constant expressions like bitcasts, leading to a null pointer dereference. This patch adds a check to bail out of the optimization when getAggregateElement() returns null, preventing the crash while maintaining correct behavior for normal constant vectors. Fixes crash with patterns like: call <2 x half> @llvm.minnum.v2f16(<2 x half> %x, <2 x half> bitcast (<1 x i32> <i32 N> to <2 x half>))
This was previously under the ELF specific options section, but is actually only supported for Mach-O
This also improves the error message to be more clear for folks who haven't used a lot of rst.
…IES (#167933) This is a fixed version of #167886. The build previously failed with `BUILD_SHARED_LIBS=ON`. After trying that locally, I uncovered a few other instances of lldb non-plugin libraries depending on clang transitively through lldbValueObject, so I added the correct clang libraries to their dependencies.
) This fixes the -fveclib flag getting lost on its way to the backend. Previously this was its own cl::opt with a random boolean. Move the flag handling into CommandFlags with other backend ABI-ish options, and have clang directly set it, rather than forcing it to go through command line parsing. Prior to de68181, codegen used TargetLibraryInfo to find the vector function. Clang has special handling for TargetLibraryInfo, where it would directly construct one with the vector library in the pass pipeline. RuntimeLibcallsInfo currently is not used as an analysis in codegen, and needs to know the vector library when constructed. RuntimeLibraryAnalysis could follow the same trick that TargetLibraryInfo is using in the future, but a lot more boilerplate changes are needed to thread that analysis through codegen. Ideally this would come from an IR module flag, and nothing would be in TargetOptions. For now, it's better for all of these sorts of controls to be consistent.
… DWARF units in .dwp files. (#167986) This path is updating the reading capabilities of the LLVM DWARF parser for a llvm-dwp patch #167457 that will emit .dwp files where the compile units are DWARF32 and the .debug_str_offsets tables will be emitted as DWARF64 to allow .debug_str sections that exceed 4GB in size.
This PR makes the following improvements to `vector.scatter` and its lowering pipeline: - In addition to `memref`, accept a ranked `tensor` as the base operand of `vector.scatter`, similar to `vector.transfer_write`. - Implement bufferization support for `vector.scatter`, so that tensor-based scatter ops can be fully lowered to memref-based forms. It's worth to complete the functionality of map_scatter decomposition. Full discussion can be found here: iree-org/iree#21135 --------- Signed-off-by: Ryutaro Okada <1015ryu88@gmail.com>
This PR adds a new utility function to check whether symbols used in OpenACC regions are legal for offloading. Functions must be marked with `acc routine` or be built-in intrinsics. Global symbols must be marked with `acc declare`. The utility is designed to be extensible, and the OpenACCSupport analysis has been updated to allow handling of additional symbols that do not necessarily use OpenACC attributes but are marked in a way that still guarantees the symbol will be available when offloading. For example, in the Flang implementation, CUF attributes can be validated as legal symbols.
Extend test to cover different -force-target-instruction-cost settings.
FIROpenACCTransforms needs to link against MLIROpenACCUtils; otherwise, linking will fail: `undefined reference to `mlir::acc::isValidSymbolUse`
…000 (#166634) Getting a gfx000 result from the `rocm-agent-enumerator` command was deprecated beginning with the release of ROCm 7, but the MLIR build system still filters it from results when looking for ROCm agents. This PR removes that filtering. There are a few other uses of "gfx000" in MLIR source, but those are used as default options for running some passes, and, to my understanding, have a semantically different meaning to the dummy result returned from `rocm-agent-enumerator` and don't need to be changed.
Same changes as in fix for [165276](#165276) except for remove unnecessary <vector> include in test to restore Ubuntu build. This is not needed as allocatable modifier is not applicable to the default clause in C/C++. Co-authored-by: Sunil Kuravinakop <kuravina@pe31.hpc.amslabs.hpecorp.net>
This patch adds codegen for CBB and CBH, CB variants operating on bytes and half-words, allowing to fold sign- and zero-extensions. Since if-conversion needs to be able to undo conditional branches, we remember possibly folded zero- and sign-extensions, as well as potentially folded assertzext and assertsext as additional arguments of the CBBAssertExt and CBHAssertExt pseudos during codegen.
This test is failing on the chromium x64 mac build because of invalid MIR. The rest of the patch is okay, so I am just deleting the test for now.
Add MemAlloc effect to the result so that cuf.alloc/cuf.allocate can be recognized by FIR alias analysis.
…kes precedence" The current "longest match takes precedence" rule for warning suppression mappings can be confusing, especially in long suppression files where tracking the length relationship between globs is difficult. For example, with the following rules, it's not immediately obvious why the first one should currently take precedence: ``` src:*test/* src:*lld/*=emit ``` This commit changes the multi-match behavior so the last match takes precedence. This rule is easier to understand and consistent with the approach used by sanitizers, simplifying the mechanism by providing a uniform experience across different tools. This is potentially breaking, but very unlikely. An investigation of known uses showed they do not rely on the length. Reviewers: thurstond, kadircet, fmayer Pull Request: #162237
…67193) This method is not used anywhere. Remove it.
These instructions use `src0`, `imm`, `src1` as operand. Fixes SWDEV-566579.
…sCommutable Need to check if the non-copyable element is an instruction before actually trying to check its NSW attribute.
… C API (#168145) Diagnose unsupported configurations when targeting the Python Limited C API. I used SEND_ERROR so that if there's multiple issues, you don't need to keep reconfiguring.
…abs in isCommutable" This reverts commit ddf5bb0 to fix buildbots https://lab.llvm.org/buildbot/#/builders/11/builds/28083.
I think this is quite a bit more readable than the nested conditionals. From review feedback that was not addressed precommitn in #167973.
This PR upstreams the codegen for the x86 vec_ext builtins from the incubator. It is part of #167752.
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