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v1.2.0

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@ortanaV2 ortanaV2 released this 22 Jul 16:13

Full Changelog: v1.1.0...v1.2.0

New Features

  • File > Import Schematic — load another .isonic file's full contents (components, wires, vias, sections, text labels) directly into the current schematic. It's staged as a paste: a ghost follows the cursor until you click to place it, so nothing existing is ever overwritten. Each imported wire/via's layer is intelligently remapped onto an equivalent layer in the current circuit (GND/+5V matched by role, ordinary layers matched by name, with a new layer created only if nothing matches).
  • CD74HC283E — 4-Bit Binary Adder with Fast Carry — new component under a new "Arithmetic" category, verified pin-for-pin and behavior-for-behavior against the real datasheet. Multiple adders can be cascaded (carry-out to carry-in) for wider addition.

Improvements

  • Raised circuit capacity limits roughly 4-8x (max components, wires, vias, junctions, sections, text labels, and the diagnostics highlight caps), so schematics at real discrete-logic-CPU scale no longer silently lose elements — this is also what fixed a bug where large selections or whole-file imports could drop wires past an old, much lower cap.

Fixes

  • Fixed Wire drawing and Import placement (and plain File > Open) sometimes needing a throwaway first click before responding after a modal file dialog closed — SDL was treating that first click as just refocusing the window rather than passing it through as real input.