1.0.0-beta.9 Public Beta

Ninth public beta.

Import Gerber and Excellon files

File ▸ Import ▸ Gerber…

• A whole file set at once, or one file. The dialog offers both; folder import classifies each
  file by its contents, so a specific file extension does not matter.
• Drill files pair up with their copper. Excellon holes become vias on the layers the plated
  span names, not loose circles on a scratch layer.
• Apertures, macros, polarity and regions are honoured — a plane with clearances arrives as a
  plane with clearances, not as an outline.
• An unstated Excellon coordinate format is refused, never guessed. Leading and trailing zero
  suppression differ by four orders of magnitude on identical text, so circuitRF prints what it
  inferred and the flag that settles it, rather than handing you a board 10,000× too small.

Layout editor

• Technology ▸ Edit… now opens the technology beside your layout instead of as another tab, wide
  enough for the full layer table — so layers can be toggled with the artwork still on screen. If
  you have already torn it off or placed it yourself, that placement is kept.

Harmonic balance

• An undefined tone is now refused by name. A Tone naming a variable your design does not have
  was silently substituted with 1 GHz, and every message after that described a frequency grid
  nobody asked for — including a commensurability refusal that blamed an innocent source. The
  refusal now names the analysis, the field, the expression as you typed it and the missing
  variable. Loadpull and loadpull-pursuit carried the same fallback and are fixed with it.
• The Analysis card lists every tone in a multi-tone run. A two-tone setup showed one
  fundamental and gave no sign the second existed.

Component, Palette & Schematic

• The SDD's "+" button now offers the port equations the device can actually use, each seeded
  with a value that runs. It previously offered a slot that silently replaced your seeded equation,
  slots for ports that do not exist, and rows that were blank — which is a parse error at Run.
  V[p], C[n] and named constants were also being rejected by the name check and swallowed by the
  file reader, though the engine reads all three.
• The impedance-network "+" is gone, along with a parameter that matched no spelling the engine
  reads and was inert on every run. A Z-matrix is fixed by the port count, so there was nothing to
  add; a stray row from an older file can be deleted.
• The palette no longer offers the same part under two names — the bare Z tile placed exactly
  what Z2P places. Use Z1P / Z2P / Z3P.
• SPICE now also lists under Devices and Nonlinear. What a SPICE component references is usually
  a transistor or a diode, so it should be findable where you would shop for one.
• BiasTee and ShowBias are pickers on all three Tuner tiles, not text boxes — each takes one of
  two spellings, and a typo used to read as the default with nothing said. All three Tuner glyphs
  now render on one row.
• VAR and MEAS labels now sit against their own glyph instead of hanging down and to the left of
  it. The label anchor was sized for a two-terminal part with leads. A parameter added after you have
  moved a label block joins the block, rather than appearing alone at the un-moved default position.

Data Display

• Converting a rectangular plot to Smith or Polar now gives a square the same size as a new one.
  It kept the wider dimension, so a converted plot came out oversized (and a converted table too
  narrow). Smith/Polar swaps and adding or removing traces still keep whatever size you set.
• Complex numbers format consistently regardless of your system's regional settings.
• Continued work on the intermittent crash some of you have reported when re-simulating with
  plots open. This round cleared the last shape-based explanation by measurement and added the stack
  and full plot state to the report, plus three real fixes found on the way: two arrays that could be
  read past each other while a trace was being rebuilt, an empty reference-impedance record that now
  falls back to 50 Ω the way a missing one already did, and a zero-port network. If you can still
  reproduce it, the note it writes now contains what we need — please keep sending them.

circuitrf convert — command line layout format conversion

circuitrf convert board.kicad_pcb out.gds
circuitrf convert gerbers/ artwork.clay

• Formats are inferred from the paths — a folder is a Gerber file set, an unfamiliar extension
  is classified by its contents. --from / --to override.
• The layer mapping matches the dialog's default, so a headless conversion and one done in the
  app agree.
• Byte-for-byte identical to what File ▸ Export writes from the same design.

Windows: the application icon

Per-user installs drew generic icons everywhere — on the Start menu shortcut, on circuitRF.exe
in Explorer, and on every .cws, .csch, .cdd and .cem document. One cause, four symptoms: the
small launcher that a per-user install puts at the install root carried no icon at all, and Windows
draws a shortcut with the icon found in its target.

All three architectures now ship the icon compiled in, verified out of the built file rather than
assumed.

Documentation

• Searching the docs finds pages by their opening sentence again. 19 of 35 reference pages were
  carrying their one-line summary nowhere in the search index — searching for "bondwire" did not find
  the wBond page, whose own first line reads "Bondwire arrays".
• Reference ▸ Tuner now states which analyses the Tuner works in, what impedance it presents at
  each frequency, and that the source tuner's drive comes from the analysis's own power ladder rather
  than from any parameter on the part.
• A new CLI chapter covers convert.
• The Known Files folder in the project tree no longer shows an empty tooltip.