[target] move the PeakRDL-generated regif to use 'passthrough'#31
Merged
Conversation
This commit solves two issues:
1) the previous usage of 'obi-flat' as interface for the register
interface introduced one extra undesired cycle of latency.
2) the 'swacc' bit used to compute soft_clear, commit, trigger
signals is not synchronous to the 'value' bit.
The first issue is solved by moving to 'passthrough', which
reduces latency in the general register-write case (this is
relevant for the main offload cases). The second issue is solved
by delaying 'swacc' by 1 cycle: this introduces a cycle of delay
but only to COMMIT_TRIGGER and SOFT_CLEAR, which is acceptable.
Member
Author
|
Tested in |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
This commit solves two issues:
interface introduced one extra undesired cycle of latency.
signals is not synchronous to the 'value' bit.
The first issue is solved by moving to 'passthrough', which reduces latency in the general register-write case (this is relevant for the main offload cases). The second issue is solved by delaying 'swacc' by 1 cycle: this introduces a cycle of delay but only to COMMIT_TRIGGER and SOFT_CLEAR, which is acceptable.