YuzukiRulerPro based on Allwinner D1-H RISC-V Processor

Ultra low cost HDMI-USB Video Acquisition (HDMI Capture Card) based on MS2109

24 channel, 100Msps logic analyzer hardware and software

SPI flash read MitM attack PoC

Iceman Fork - Proxmark3

Tear-down effort of the Pixmob wristband used in NDP2019.

ISP for the ABOV MC81F4204

A Forth CPU and System on a Chip, based on the J1, written in VHDL

Forth for RISC-V SBCs

Bare-metal Forth implementation for RISC-V

Official Source code for the WikiReader (by Openmoko)

Playground (and dump) of stuff I make or modify for the Flipper Zero

An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.

Open-source high-performance RISC-V processor

Flipper Zero Unleashed Firmware

μLA: Micro Logic Analyzer for RP2040

A toolkit for helping you reverse engineer ESP32 firmware.

A minimal GPU design in Verilog to learn how GPUs work from the ground up

XBOX 360 advanced glitching - Reverse Engineered using a logic analyzer.

A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration

SERV - The SErial RISC-V CPU

PicoRV32 - A Size-Optimized RISC-V CPU

A minimal tensor processing unit (TPU), inspired by Google's TPU V2 and V1

3-stage RV32IMACZb* processor with debug