FPGA Accelerator for CNN using Vivado HLS

🤘 TT-NN operator library, and TT-Metalium low level kernel programming model.

A FPGA Based CNN accelerator, following Google's TPU V1.

同时支持传送TCP与UDP的KCP通道，附带端口跳跃的功能，以及FEC，自带中继服务器支持

A Modeling and Verification Platform for SoCs using ILAs

Advanced Matrix Extensions (AMX) Guide

An example of using Ramulator as memory model in a cycle-accurate SystemC Design

Generate an accelerator extension that makes your Antlr parser in Python super-fast!

Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators

ImpactX: an s-based beam dynamics code including space charge effects

My notes on various HPC papers.

Tool to simulate beam dynamics in synchrotron light sources

NeuroSpector: Dataflow and Mapping Optimization of Deep Neural Network Accelerators

NATSA is the first near-data-processing accelerator for time series analysis based on the Matrix Profile (SCRIMP) algorithm. NATSA exploits modern 3D-stacked High Bandwidth Memory (HBM) to enable efficient and fast matrix profile computation near memory. Described in ICCD 2020 by Fernandez et al. https://people.inf.ethz.ch/omutlu/pub/NATSA_time-…

Fast Linear Accelerator Model Engine

Open Source Code for Advanced Radiation Simulation

simulating connection of micro processor and accelerator on a bus context with systemc language

Out-of-the-box CHaiDNN implementation on Zynq ZCU104

NPUsim: Full-system, Cycle-accurate, Value-aware NPU Simulator

Accelerated Stencil Computation with Optimized Dataflow Architecture on FPGAs