Tengine is a lite, high performance, modular inference engine for embedded device
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Updated
Dec 24, 2023 - C++
Tengine is a lite, high performance, modular inference engine for embedded device
Efficient Inference of Transformer models
Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classification, detection, and segmentation problem.
Samples code for world class Artificial Intelligence SoCs for computer vision applications.
The Pipeline example based on AXear-Pi (AX620A) , AXera-Pi Pro (AX650N) and AXera-Pi Zero (AX620Q) shows the software development skills of ISP, Image Processing, NPU, Encoding, and Display modules, which is helpful for users to develop their own multimedia applications.
FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
YoloV5 NPU for the RK3566/68/88
Advanced driver-assistance system with Google Coral Edge TPU Dev Board / USB Accelerator, Intel Movidius NCS (neural compute stick), Myriad 2/X VPU, Gyrfalcon 2801 Neural Accelerator, NVIDIA Jetson Nano and Khadas VIM3
hardware design of universal NPU(CNN accelerator) for various convolution neural network
Small Heterogeneous & AI Powered Computing SBC Based on V853
Easy usage of Rockchip's NPUs found in RK3588 and similar chips
ROS 2 Inference sample for using Rockchip NPU.
Convert and run scikit-learn MLPs on Rockchip NPU.
Superresolution running on Rockchip NPU (RK3588, etc..)
YoloV8 segmentation NPU for the RK 3566/68/88
NPUsim: Full-system, Cycle-accurate, Value-aware NPU Simulator
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