ALU created in VHDL

🖥️ A collection of SystemVerilog modules and Assembly programs. This repo includes examples of decoders, encoders, binary adders, and interactive games such as Guessing Game implemented in hardware description and assembly languages, illustrating practical applications in digital systems and microprocessor interfacing.

Various small programs: barnsley fern, game of life, christmas tree, langton's ant, bean machine, etc.

Implementing a 4-Bit ALU in Ngspice

Implementing a 4-Bit ALU in Verilog

Computer Architecture Projects

RISC V PROCESSOR DESIGN IN VERILOG

Designing & Implementing a 4-Bit ALU in MAGIC Layout

Solutions for The Nand Game, a game that teaches the fundamentals of computing by building a computer from scratch.

Contains the project resources of the course CSE306. These were group projects.

Design and Implementation of Arithmetic Logic Unit Capable of Calculating Z=1/4(A X B)+1

In a Single Cycle Datapath, each of the Datapath's components carries out an instruction in one cycle. Therefore, no Datapath component may be utilized more than once each cycle.

Computer Organization 1st Project

An ALU designed for the coursework "Digital Design and Computer Architecture" given by Prof. Onur Mutlu at ETH Zurich (Spring 2023)

The project is a Python-based simulation of a computer processor that enables users to explore the various components and functions of a processor in a controlled environment.

Making computer architecture parts from a CPU on minecraft.

Simple arithmetic logic unit

This is a repository containing all the simulations and reports of CSE-306 Computer Architecture Sessional.

A final year undergraduate major project. (Dec 2019 - Mar 2020)

Assignments done in CSE306 course offered by CSE, BUET