Bluespec System Verilog language extension for Visual Studio Code
-
Updated
May 11, 2018 - Bluespec
Bluespec System Verilog language extension for Visual Studio Code
Learning Bluespec on an iCEBreaker FPGA
To toy around with Bluespec-SystemVerilog and my Basys3 board
Bluespec SystemVerilog extension for VS Code
Low-cost modular acquisition and stimulation system for neuroscience
Bluespec SystemVerilog implementation of the Keccak primitive (SHA-3)
Domain Specific Hardware Accelerators - VLSI CAD Project
P4-14/16 Bluespec Compiler
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开发的优势。
Add a description, image, and links to the bluespec topic page so that developers can more easily learn about it.
To associate your repository with the bluespec topic, visit your repo's landing page and select "manage topics."