An experimental Instruction Set Architecture (ISA) and the implementation of a CPU simulator and an assembler.
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Updated
Sep 19, 2019 - C
An experimental Instruction Set Architecture (ISA) and the implementation of a CPU simulator and an assembler.
School project: Domain name filtering DNS server
homebrew computer with a (almost) 16 bit architecture
A full gate-level circuit implemented by C, representing the datapath for a reduced MIPS ISA.
My attempt at a CPU simulator
An assembler for the ISA of the hypothetical machine Ahmes
This is an implementation written in C of the Hack assembler outlined in project 6 of the online course "Nand To Tetris".
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