Approximate layers - TensorFlow extension
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Updated
Apr 22, 2024 - C
Approximate layers - TensorFlow extension
Verilog Codes for various digital circuits for labs at IIT Ropar, basic gates, adders & subtractors (half & full), ripple adders, multipliers and code converters.
Approximate Multipliers of 8bit and 16bit operands, built with approximate compressors.
Bingo game with score
A 32-bit Signed Vedic Multiplier created using Verilog HDL utilising Vedic Mathematic Sutras formed using Carry Lookahead Adders as the basic building blocks.
Verilog Multiplier Implementation
Character typing game using TypeScript
The computational speed of the dadda multiplier can be enhanced by partitioning the partial products. In process to achieve low power we have considered pass transistor for logical implementation.
Design and Analysis of an FPGA-based Wallace Multiplier.
idle game thingy.
Different Multipliers code in VHDL and Comparison
Useful VHDL scripts for hardware description.
Digital design project for a simple integer multiplier using Booth's multiplication algorithm made through ASM design method
Parameterized and 4-bit carry save multiplier design
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