CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
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Updated
Nov 25, 2019 - SystemVerilog
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
A Framework for Design and Verification of Image Processing Applications using UVM
A simple testbench with two refmods using UVM Connect
A simple UVM testbench using UVM Connect and Octave
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