an implementation of the FAN ATPG algorithm in c++ and verilog.
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Updated
Dec 18, 2023 - C++
an implementation of the FAN ATPG algorithm in c++ and verilog.
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers on FPGAs
A collection of Schematics, PCBs and VLSI work on various platforms
Template project for using gatery
Simplify VLSI (timing, power, noise, correlation, reliability) modeling and analysis with Characterization Description Format
Gatery, a library for circuit design.
Courseworks of CS6165 VLSI Physical Design Automation, NTHU.
Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
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