Version 0.12.5

A maintenance release mostly with bugfixes.

• Fix NativeProxy builds (credit to @smx-smx)

• X86TextAssembler assembled SHRD as SHLD

• Added InstructionComparers to all architectures. We need InstructionComparers to make procedure fingerprinting possible.

• Added a framework for binary fingerprint identification. Future work could ingest run-time libraries and recognize well known procedures, in order to build fingerprint libraries.

• Generate global variable names from strings, by mangling them.

• Added support for PS2 Emotion Engine

• Added support for disassembling and lifting PS2 EE binaries.

• Added support for PS2 EE calling convention.

• Refactored MIPS disassembler and rewriter classes into namespaces
  The PS2 EE GP registers are 128 bits, but the memory accesses are only
  32 bits. We need to truncate the GP registers before using them in
  effective memory addresses.

  Credit to @smx-smx for originating the code.

  Feature: support for the PS2 Emotion Engine

  This commit introduces support for the PS2 Emotion Engine, a.k.a.
  MIPS 5900. It introduces a new ISA for the MIPS architecture,
  as well as some new registers.

  This is not a complete implementation yet, but implements many of
  the new instructions. Future commits will fill out the missing
  decoders and lifters.

• Corrected zSeries disassembled constants so they are rendered as the "z/Architecture Principles of Operation" manual does.

• Added many more zSeries lifters to improve coverage of IBM binaries.

• Added more Blackfin instruction decoders.

• Feature: IntrinsicProcedure.IsInstanceOf. Use this new method to determine whether an intrinsic is an instance of a possibly generic intrinsic.

• Enhancement: pedantic checking of RtlAssignment argument sizes.

  We are allowing RtlAssignments with src and dst of different sizes.
  In some cases, we let this slip through, but in other cases it's an actual
  bug and should be fixed. The #if PENDATIC in the RtlAssignment
  constructor is a reminder that this should be mainline, not commented out.

  About 400 unit tests fail when PEDANTIC is set.

• Feature: add RegisterBank to Reko.Core.Machine

  This class is used for lookups from register names or
  StorageDomains.

  Some TLCS900 instructions were being lifted incorrectly,
  resulting in assigments with unequally sized left- and
  right-hand sides.

• Feature: first cut of RiscOS AIF loader.

  Initial support for RiscOS AIF images. More info can be extracted from
  AIF binary images, but it's a start.

• Fix: MN103 disassembler and lifter

  • The abs32 method in the MN103 disassembler was generating
    Address operands instead of memory accesses of absolute addresses

  • Several instructions that affect the condition codes were not
    lifted by the MN103Rewriter correctly. The results of an ALU
    operation must always be fed to a COND() intrinsic before being
    assigned to the CPU status word register.

  Fix: MN103 syscall lifter

  The MN103 syscall #N lifter wasn't supplying the operand as an argument
  to the syscall intrinsic function.

  Classify MN103 CALLS instructions

  Use InstrClass.Call for the direct d16 and d32 forms and InstrClass.CallInd for the register-indirect form. Add focused disassembler and rewriter coverage, and add Alexander Rassokhin to AUTHORS.

  Fix MN103 decoding of (d32,SP) operands and CALLS with 32-bit displacement

  The FC-prefix (6-byte) page of the MN103 disassembler had two decoding bugs:

  • The d32_sp mutator was defined with reg_relative_u16, so every
    (d32,SP) memory operand (the MOV/MOVBU/MOVHU forms at FC 8x/9x/Bx)
    read only 16 of its 32 displacement bits. Besides yielding a wrong
    displacement, the decoded instruction was 4 bytes long instead of 6,
    so the disassembler lost sync with the instruction stream from that
    point on.

  • CALLS with a 32-bit displacement (FC FF) was decoded as an
    SP-relative memory access, "calls (d32,sp)". This form is
    PC-relative: the target is the address of the CALLS instruction plus
    the displacement, analogous to the 16-bit form (FA FF) which already
    decodes with d16_pc. With the fix, the operand is the resolved call
    target address.

Thanks to @smx-smx and @sympho-ru for their contributions!