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Welcome to the MMSE_CPP Wiki!

MMSE_CPP is a high-performance, production-ready LTE Physical Layer (PHY) baseband engine. It focuses on the most compute-intensive and latency-critical components of the downlink receiver: Channel Estimation, MMSE Equalization, and Control Channel (PDCCH/PCFICH/PBCH) Decoding.

This project bridges the gap between complex 3GPP mathematical models and extreme hardware optimization, leveraging C++ AVX2/AVX-512 SIMD and NVIDIA CUDA for heterogeneous computing.

📖 Wiki Directory / 目录

To help you navigate the codebase and understand the architecture, we have documented the system across the following pages:

1. Architecture & Design

• Memory Model: SoA vs AoS - Why Structure of Arrays (SoA) is critical for our SIMD/CUDA bandwidth.
• Heterogeneous Dispatch - How the system balances CPU ultra-low latency with GPU massive throughput.

2. Core Modules

• MMSE Equalizer (PDSCH) - 2x2 MIMO spatial multiplexing, Cramer's rule SIMD expansion, and Newton-Raphson division.
• Transmit Diversity (PDCCH) - Alamouti Space-Frequency Block Coding (SFBC) implementation without matrix inversion.
• Control Plane Parsing - The PCFICH and PDCCH extraction and decoding pipeline.

3. Performance & Benchmarking

• Profiling Report - Deep dive into CPU AVX2 vs. CUDA performance, PCIe latency hiding, and CUDA Streams.

4. Project Roadmap

• Status & Roadmap - Current progress and what's coming next (Soft Demapper, FEC Decoders).

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If you are new here, we recommend starting with the Memory Model page to understand how data flows through the engine.