Profiling Report

Performance & Profiling

Profiling LTE basebands reveals the classic tradeoff between Latency and Throughput.

CPU (AVX2) vs. GPU (CUDA) Baseline

In a synchronous, independent-call benchmark (docs/lte_mmse_budget_report_2026-07-01.md):

• CPU AVX2: ~1916 $\mu s$
• GPU CUDA: ~2262 $\mu s$

Why did the GPU lose here?

• PCIe Tax: Over 70% of the GPU time is spent on Host-to-Device (H2D) and Device-to-Host (D2H) memory transfers.
• Launch Overhead: Synchronous kernel launches accumulate $5-15 \mu s$ delays per call.

The GPU Solution: Asynchronous Pipelining

To unleash the GPU, MMSE_CPP implements StagingBuffers in src/mmse_equalizer_gpu.cpp. We use a 3-stage Ring Buffer with Pinned Memory (cudaHostAlloc) and CUDA Streams.

This allows us to overlap:

• Stream 0: Kernel execution for Subframe $N$
• Stream 1: H2D transfer for Subframe $N+1$
• Stream 2: D2H transfer for Subframe $N-1$

By completely hiding the PCIe transfer latency, the GPU path easily scales to Massive MIMO and multi-sector configurations where the CPU would choke.