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{bp-19454} boards/stm32f3: nucleo-f302r8:ihm07m1_b16: enable LTO to fit flash - #19705

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{bp-19454} boards/stm32f3: nucleo-f302r8:ihm07m1_b16: enable LTO to fit flash#19705
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@jerpelea jerpelea commented Aug 6, 2026

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Summary

The ihm07m1_b16 (FOC motor control) configuration overflows the STM32F302R8 64 KiB flash region by ~470 bytes, so it no longer links. Enable GNU Full LTO (CONFIG_LTO_FULL=y); cross-module dead-code elimination brings the image back under the limit (flash drops from ~66.0 KiB to ~57.7 KiB, 88%).

Includes
#19212
#19297

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Testing

CI

@jerpelea

jerpelea commented Aug 6, 2026

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PLEASE DO NOT MERGE UNLESS CI PASSES

@github-actions github-actions Bot added Size: XS The size of the change in this PR is very small Board: arm labels Aug 6, 2026
@github-actions github-actions Bot added Area: Documentation Improvements or additions to documentation Arch: arm Issues related to ARM (32-bit) architecture Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces. and removed Size: XS The size of the change in this PR is very small labels Aug 6, 2026
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jerpelea commented Aug 6, 2026

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CI should be restarted after #19716 is merged or (arm-08) will fail due to lack of flash space

anjiahao1 and others added 2 commits August 6, 2026 15:49
The ihm07m1_b16 (FOC motor control) configuration overflows the
STM32F302R8 64 KiB flash region by ~470 bytes, so it no longer links.
Enable GNU Full LTO (CONFIG_LTO_FULL=y); cross-module dead-code
elimination brings the image back under the limit (flash drops from
~66.0 KiB to ~57.7 KiB, 88%).

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Replace the divergent board conventions for the timer input clock
frequency with a single uniform convention provided by every board:

- STM32_APBx_TIMn_CLKIN and BOARD_TIMn_FREQUENCY -> STM32_TIMn_CLKIN
- STM32_APBx_LPTIMn_CLKIN, BOARD_LPTIMn_FREQUENCY and
  STM32_LPTIMn_FREQUENCY -> STM32_LPTIMn_CLKIN
- STM32_APB1_THRTIM1_CLKIN and BOARD_HRTIM1_FREQUENCY ->
  STM32_HRTIM1_CLKIN

All STM32 consumers (tim/lptim/pwm/adc/dac/capture/sdadc/dfsdm/
pulsecount) updated to match; the timer input clock is now bus-agnostic
in the drivers.

Boards that carried the same timer clock in more than one convention now
define STM32_TIMn_CLKIN exactly once, derived from the APB bus clock
(PCLKx with the x2 doubler when the APB prescaler is greater than 1),
instead of redefining it with a second, sometimes different, value.

BREAKING CHANGE: The timer input-clock board macros STM32_APBx_TIMn_CLKIN,
BOARD_TIMn_FREQUENCY, STM32_APBx_LPTIMn_CLKIN, BOARD_LPTIMn_FREQUENCY,
STM32_LPTIMn_FREQUENCY, STM32_APB1_THRTIM1_CLKIN and
BOARD_HRTIM1_FREQUENCY are removed in favor of STM32_TIMn_CLKIN,
STM32_LPTIMn_CLKIN and STM32_HRTIM1_CLKIN.  Out-of-tree boards must
define the new macros (drop the APB bus from the name, keep the value),
and out-of-tree drivers referencing the old names must be updated.

Signed-off-by: raiden00pl <raiden00@railab.me>
@jerpelea

jerpelea commented Aug 6, 2026

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#19723 needs to be merged before restating CI

This reverts commit 1240ee3. which is
out of sync with releases/13.0 nuttx-apps

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
@jerpelea
jerpelea requested a review from anchao as a code owner August 7, 2026 07:43
Vajnar and others added 2 commits August 7, 2026 12:47
New series of the STM32F746G-DISCO use Winbond W25Q128JVEQ. This commit
adds support for it.

Signed-off-by: Martin Vajnar <martin.vajnar@gmail.com>
Build fs_link.c unconditionally so link() remains available even when
CONFIG_PSEUDOFS_SOFTLINKS is disabled. Return ENOSYS in that
configuration instead of leaving applications with an undefined symbol.

Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
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Arch: arm Issues related to ARM (32-bit) architecture Area: Documentation Improvements or additions to documentation Board: arm Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces.

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