Phoenix SDR-DSP v0.4.0 — Radix-4 Stockham FFT on Phoenix NPU
Highlights
M17 is now an O(N log N) radix-4 Stockham FFT on Phoenix NPU, not the O(N^2) direct DFT shipped in v0.3.0.
Silicon result (N=64, NPU1 / AIE2)
| Metric | Value |
|---|---|
| Peak bins | [4, 12, 20] (match numpy) |
| Max abs error | 8e-6 |
| RMS abs error | 1e-6 |
| SNR | 138.79 dB |
| NaNs | 0 |
What broke, what fixed it
IRON Worker defaulted to AIETargetModel::getDefaultCoreStackSize() = 0x400 (1 KB). The general-stage frame overflowed into ObjectFifo buffers at tile offset 0x400 and produced an 8-float tiling / 32-NaN pattern. Stage 0 fit in 1 KB and was already bit-correct.
Fix: Worker(..., stack_size=0x4000) (same value as AMD FFT_R4_AIE single_core.py) plus alignas(aie::vector_decl_align) on butterfly_in / butterfly_out / twiddle_buf.
Not in this tag
- IFFT / round-trip test
- Merge of
feat/m17-radix2-fft-npuintomain - Retirement of the M17 direct-DFT kernel from
run_all_silicon_tests.py