A MonteCarlo light propagation algorithm on a Xilinx FPGA using High Level Synthesis.
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Updated
Jun 6, 2017 - C
A MonteCarlo light propagation algorithm on a Xilinx FPGA using High Level Synthesis.
CHO is a benchmark suite for OpenCL FPGA Accelerators
This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.
Signature Based Fault Tolerance
HLS SHA-3 Accelerator
A Compiler for the Popr Language
Laboratory exercises on cards with ARM, FPGA and sensors
Laboratory exercises on cards with ARM, FPGA and sensors for "Embedded System Design" course NTUA 2020 -2021
Finding bugs in high-level synthesis tools using Csmith to generate random, valid C programs.
A RISC-V core for my high level synthesis compiler
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