OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
-
Updated
Oct 20, 2024 - Python
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
System on Chip toolkit for Amaranth HDL
System-on-Chip Resource Adaptive Scheduling using Deep Reinforcement Learning
Examples of using Litex on an Alchitry Cu board
Add a description, image, and links to the system-on-chip topic page so that developers can more easily learn about it.
To associate your repository with the system-on-chip topic, visit your repo's landing page and select "manage topics."