Xilinx Picoblaze Assembly Simulator and Debugger
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Updated
Apr 10, 2017 - Python
Xilinx Picoblaze Assembly Simulator and Debugger
Xilinx Hackathon 2017 Project for tracking the number of cars in an arbitrary number of parking lots with an arbitrary number of entrances.
Visual System Integrator - Accelerate your embedded development
mirror of https://git.elphel.com/Elphel/ezynq
Eye Cleaner for Xilinx transceivers
Python wrapper for Xilinx's XSCT/XSDB console
AI High-Performance Solution on FPGA
AI High-Performance Solution on FPGA
A Python-based IP Core Management Infrastructure.
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)
Python bindings for Basler's VisualApplets TCL script generation.
The Flow to Deploy your Custom Deep Learning Models on Ultra96V2.
Detect macaques with Xilinx KV260! Powered by CenterNet
Tool for graphically viewing FPGA bitstream files and their connection to FASM features.
A command line utility to generate bitstreams and various programming files easily for PLDs
Bazel rules for Xilinx Vivado
FPGA mandelbrot accelerator via high speed/super speed USB
Deploying Deep Learning on FPGA: an assessment of ConvNets performance on Xilinx Zynq MPSoC using Vitis-AI development platform
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