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released this 09 Mar 00:39
· 3924 commits to master since this release
v1.15

Release Notes for OpenPower Firmware v1.15

Package: barreleye-xml

Repository

Patches

Commits

No changes.

Package: firestone-xml

Repository

Patches

Commits

Sertac Cakici (1):

  • 2494a4306565 SW377484 fixes - adding RESOURCE_CRITICAL lines

Package: garrison-xml

Repository

Patches

Commits

Erich Hauptli (4):

Package: habanero-xml

Repository

Patches

Commits

No changes.

Package: hostboot

Repository

Patches

Commits

Abhishek Agarwal (2):

  • 630fe13c4f0e p9_getecid update for DD level DD1.04 IBUF fix
  • fb8821cd1a16 PERV SBE: Level 1 Procedure - p9_sbe_chiplet_reset

Alex Taft (1):

Amit Kumar (4):

Andre Marin (32):

  • f749a664891a Add FORCE_FIFO_CAPTURE API and UTs. scominit cleanup.
  • 19f6e0687252 Disable DQS polarity workaround.
  • e2f97713da16 Change port sorting for memdiags subtest insertion to be in order
  • 993c0b9a63ab Add DP16 API and unit testing needed to set PBA mode for LRDIMMs
  • 56c9d9c860b3 Add RDIMM raw card reference B1 to RCD settings list
  • d54d2c207077 Cleaned up spd decoder interface, preparing for common code with Cumulus
  • 1138b6b6981f Add new generic memory folder w/empty files for HB to mirror
  • 10c47be72973 Add c_str generic API and update makefiles
  • 3db9e21a6b52 Enable bad training bits workaround, always
  • c7588688e17c Adding empty DD4 spd decoder files for HB to mirror
  • 1af88d6b888c Add state machine for mrep and dwl training and unit tests
  • 6837ea2a8c03 Add c_str generic API and update makefiles
  • 77b203d67647 Simplify spd factory mapping to share among controllers
  • de000da6f216 Disable PPR and sPPR mode in draminit to comply w/JEDEC POR
  • 6daba5f9c16d Add initial p9c ddr_phy_reset, dimmBadDqBitmapAccessHwp, slew, & unmask_errors
  • 8a1704ae2bc2 Add DQS mux map for X8 DRAMs
  • 552f94ffb84c Add x8s to address translation table
  • 798ced5173c0 Add rdimm decoder module, incorporate to base spd decoder
  • 1b05a2b9cb7d Remove eff_config hardcoded values, mirroring, trfc_dlr, & modify ut's
  • 4522a72faa17 Add RCD infrastructure, remove RCD hardcodes from eff_config
  • 6455e789d32c Add SPD decoder fall back options for unsupported revisions
  • a6be506a5bdc Modify raw_card infras. to take in general raw card revs
  • 5dc398cd7b54 Add LRDIMM SPD revision table
  • 7117715cecf5 Fix RCW infrastructure for LRDIMM and RDIMMs
  • 890759122216 Add LRDIMM to translation register infrastructure and unit tests.
  • 349f0d6c2a5f Add common functionality between RCD and data buffer control word API
  • eb369b6353db Add BCW API for rank presence, buffer training, mrep timing and UTs.
  • c6619cb79add Add DP16 API and unit testing needed to set PBA mode for LRDIMMs
  • 4aa5857f24f3 Cleaned up spd decoder interface, preparing for common code with Cumulus
  • 2ccacdf494ec Add c_str generic API and update makefiles
  • 6db2b8386af9 Simplify spd factory mapping to share among controllers
  • a844e1ce6fd7 Add x8s to address translation table

Andres Lugo-Reyes (3):

  • 95409452c0f8 WOF: Add NEST_LEAKAGE_PERCENT attr needed for WOF core leak calc
  • c36ec02ce1b0 WOF: Add Defaults to mrw parsing code for NEST_LEAKAGE_PERCENT
  • f55ce181d7f6 Add MRW parsing code to populate ATTR_NEST_LEAKAGE_PERCENT

Anusha Reddy Rangareddygari (18):

Aravind T Nair (1):

  • 65cc747f724e Minor change to fix compile errors from cal_timers.H on the FSP

Ben Gass (8):

  • e346dc4483d3 Adding chip_ec_feature attributes for dd2 build
  • 0446c85a500a Remove action bit settings for HCA from p9_chiplet_scominit.
  • bc069612ed52 Adding generated Centaur scom and field constants.
  • 4477a6e28212 p9_thread_control poll more than once for thread running.
  • 067163534e2a Updating NV scom address xlate for dd2.
  • c3170c087bfe p9_scominfo update cannot do a mask check with a mask value of 0's.
  • e033d7a7a6c8 Removing trailing comma in system_attributes.xml
  • e0af4445f2a3 Translate logical mca regisers in mcs chiplet as mca target type

Benjamin Weisenbeck (4):

Bill Hoffa (3):

Brian Silver (14):

Brian Stegmiller (4):

Brian Vanderpool (2):

  • 0ad25294028f Fix clearing CME_FLAGS to use EX target instead of EQ target
  • 75c1736b3a17 L2 Delivery for p9_query_core_access_state

CHRISTINA L. GRAVES (4):

Caleb Palmer (16):

Chris Engel (1):

Chris Steffen (3):

Claus Michael Olsen (4):

  • 7f40e1f4f007 Small fix to TOR API to NOT display dbg msg when passed a ringId
  • a34fbecab776 Support for SECURITY_MODE attribute in xip_customize.
  • 4d144fd0ec96 xip_customize: MVPD compatible file set.
  • 9e420739cf0d ana_bndy RS4v2 algorithm support in ring_apply to accommodate proper

Corey Swenson (13):

Dan Crowell (32):

Daniel M. Crowell (1):

  • 678260620b9b Revert "i2c: only send 1 master stop in FORCE_UNLOCK reset mode"

David Kauer (1):

David Young (1):

  • 702f97428d99 PPE-HWP: [Level 2] Poweronoff Hcode Procedures using API

Dean Sanner (18):

  • d9e774591286 Fix algorithm to deconfig non paired cores in fused mode for BU
  • b89ddf13d927 Temporarily remove HDAT IPMI
  • b8da45026ffe Improve error output on console
  • 47278f0f5630 Fix VPD record size calculation
  • 1a26cf4d4ad0 Fix how processMrw sets FAPI_POS number on memory sub system
  • fa156b4bd344 Updates to allow SBE update to work for OpenPOWER
  • 4bca31cf0a25 Fix to compile without secureboot config option
  • eb217e512338 Ensure sbefifo is clean on slave chips before starting
  • 2702c541b384 Disable SBE updates on FSP based systems
  • 2ed0c0430696 Remove phantom MCS/MCA functional targets in single socket
  • e6e1cf5cf4cc Fix crash in err manager RP when non acked errors in PNOR
  • df47aac68176 Support reading RISK_LEVEL from mbox scratch regs
  • fca7338f98ea Don't reset/setup I2C master 0 as SBE owns it
  • 988d8d537152 Only update SBEs on chips connected to powerbus
  • ec0476878770 Reduce memory fragmentation during SBE updates
  • 74c9defa9de6 Defer setup of MC multicast groups in async mode
  • a77b28c8b0a6 Don't customize risk level into SBE image, default to risk 0
  • a0437b216fea Enable STOP wakeup on Hypervisor External Interrupt

Dzuy Nguyen (1):

  • 1a2e5662b8ec Change tod_utils.o to DEPLIBS in p9_tod_save_config.mk

Elizabeth K. Liner (1):

  • 1b510a6d3920 Revert "Adding hardware to fspCI command for the release tool"

Elizabeth Liner (4):

  • 989c9e43856d Adding support for Auto Releases with a previously created track
  • 3b69a19abe72 Adding FSI and PNOR interfaces for PRD FIRDATA in HBRT
  • 2eaec45e0bf6 Adding interface changes to provide I2C information to HDAT
  • ea45f786fc68 Adding hardware to fspCI command for the release tool

Greg Still (12):

  • faac790c009c p9_pm_pfet_init: redo log2 function to fix delay settings
  • 4f910ecbbe58 Update pm_plat_attributes with defaults and better descriptions
  • f5cb7f98631c p9_pfet_init: remove PFET attributes as they have no real value
  • c912e95c5651 p9_sbe_select_ex Level 2 update
  • 6553e4a7f500 p9_setup_evid: add system parm (loadline, etc) support
  • 1e3e374a548a p9_pm_pstate_gpe_init and p9_pm_pba_init updates for PGPE booting
  • 6372ddd780c3 p9_hcode_image_build: Fix repair ring calls to use BASE variant, not risk level
  • 0b78736a9628 Level 2 p9_cpu_special_wakeup
  • e151de17038e PM: add ATTR_PGPE_HCODE_FUNCTION_ENABLE attribute to control PGPE ops
  • 656dba37c5ae p9_block_wakeup_intr Level 2 - fix PPE compilation issue
  • 708c686faf2a p9_pm_pstate_gpe_init Level 2
  • d9739e649c66 p9_pm_pstate_gpe_init and p9_pm_pba_init updates for PGPE booting

Gregory S. Still (1):

  • 79b2f37bb381 Revert "PM: Change in self sestore region for lab."

Ilya Smirnov (2):

  • 03e362b0def5 Ensure TODOs associated with commit's RTC/CQ are addressed.
  • f28820173664 Porting ekb verify-commit enhancements to hostboot

Jacob Harvey (13):

Jaymes Wilks (4):

Jenny Huynh (8):

Joachim Fenkes (1):

  • 1dcd6b806311 p9_sbe_chiplet_reset: Change NX_1 hang pulse period to 68s

Joe Dery (3):

  • fc98a8507232 p9_common_poweronoff: delay 10us/40k simcycles between FSM idle polling
  • 8c7b26e89a59 Fixed even/odd EX multicast setup checking ATTR_PG_EPxx clockdomains
  • 2b9f7628eed5 p9_sbe_chiplet_reset Level 2 update: set EC/core multicast reg3=group3

Joe McGill (18):

  • 3bcd6c564bb8 FBC updates for HW383616, HW384245
  • 9055d62baf47 p9_sbe_tp_chiplet_init3 -- disable TP TOD hang pulse
  • b07177bb4bf0 p9.core.scan.initfile -- mask local error from CC in EC perv LFIR
  • 2dd60aa28799 p9_xip_customize -- remove customization of slave status and FBC IDs
  • ca9ec67ae97c p9.fbc.ioe_tl.scom.initfile -- correct workaround for HW384245
  • 32f4cf46ecda p9.mcs.scom.initfile -- apply workaround for HW400075 in RL=0 only
  • dfd99ef1c2c4 p9_mem_startclocks -- restore fabric group/node ID in async mode
  • 38567a555ba1 Shift HWP content to align with desired EKB layout
  • caef497d05d5 PLL configuration updates -- permit e2e bypass execution
  • ecce6e942219 VAS FIR updates
  • d9f3bcf91316 p9_sim_model_boot -- Updates
  • 79bb34802509 configure FBC pump mode in SBE
  • 2677d64ef5c8 CXA FIR updates
  • dbb2cfc9f531 NX FIR updates
  • 07edb2c171f5 partial good/hang pulse updates to support all sim models/clock ratios
  • 02d4d3681aae p9_rng_init_phase2 -- set NX RNG enable/security lock even if not mapping BARs
  • 3b44d04006f3 adjust SRAM timings
  • d0bc5a168223 nest_attributes.xml -- add 'effective' FBC group/chip ID attributes

Joshua Hannan (3):

  • da17babb7a6e masking bits 60-61 of PB fir register for link0,1 sim error
  • 2fc2af3a3531 adding insert for soft fail threshold for dd1 and dd2
  • 9012fedd10ea adding sim and dd1 check to fir mask

Juan Medina (2):

Kahn Evans (2):

Louis Stermole (13):

  • 61ea8ae1317e Add structure and read of MCBIST compare test results
  • df3fc6c525ee Set MSS blue waterfall workaround to only run after coarse rd/wr cal step
  • adcbb2fdbd5d Adding ECC syndrome register access functions
  • 3e26f356fe1f Add Galois-symbol-DQ mapping tables and functions
  • 3666b202d703 Fix 1R dual-drop bugs
  • d89057a043ba Adding top level ECC API functions
  • 47ab5a5132ae Fixing fail in mss_ecc_api_ut.C (p9_mss_ut.exe) unit test
  • 8064970f23b6 Added -repair option to mss_memory_ecc_decode_wrap to set symbol marks
  • 4b41e4f192cf Add MSS seq_workarounds.H header file for Hostboot CI
  • a7304a5938ed Added MSS seq_workarounds.C file for Hostboot mirroring
  • bc4bd5e18cff Add workaround for DDRPHY ODT config register erratum (ODT2, ODT3 bits swapped)
  • e5b630dccc41 Add attribute ATTR_EFF_RANK_GROUP_OVERRIDE
  • 8a6f2a39aa4f Add MSS restore_repairs function

Luke Mulkey (1):

  • e8b23d324a49 Existing code changes for ddr_phy_reset HB mirror

Luke Murray (2):

  • 7b5c5bc1e97e Adding skip group dials for cache when chip=group
  • 917a53e806d0 Updating P9 L2 scan initfile to use attributes

Martin Peschke (6):

Marty Gloff (14):

Matt K. Light (1):

  • 42ebb8a83e40 store hw access errors to a ffdc buffer for p9_pib2pcb_mux_seq

Matt Ploetz (3):

Nick Bofferding (5):

Nick Klazynski (3):

  • 91725e5965f2 workarounds for HW399919 HW400898 HW398269 HW398269 HW399765
  • 8f83deca45e7 WAs for HW401811 HW402145 HW403465; DIS_MULTIPLE_TBLW on all modes
  • e8cf80c1842e Add three WATs, remove IMC2, replace stop2 workaround

Prachi Gupta (5):

Prasad Bg Ranganath (2):

  • 0bfa76155cb6 PSTATE parameter block:POUNDV parsing function vs native implementation
  • 23444ce58981 pstate parameter block: precalculated slopes

Prem Shanker Jha (9):

  • 3b706854fe31 PM: Bug Fix pertaining to SCOM Restore Entry for NCU_DARN_RNG_BAR
  • bfe125e6f06c PM: Suppressing TOR Traces by using debug level 0.
  • 16ed14ff481e PM: Fixed offset for CME Instance rings in CPMR Header.
  • a6a1c07a1d58 PM: Change in self sestore region for lab.
  • b04eb38223ef PM: Corrected byte alignment for CME repair ring.
  • 12aa2afb4f95 PM: Added changes in SCOM restore region.
  • 7e90fda6d819 PM: Customization of CME and SGPE rings in HOMER.
  • 696a36ef0678 PM: Image layout change for CME/SGPE Region of P9 HOMER.
  • d3d4ae7c89e6 PM: Added support for PGPE Boot/PGPE integration

Rahul Batra (2):

Raja Das (5):

  • 44eaa7b67e29 Added Quad Power Management Mode Register Clear for Quad Power Hwp
  • 014cf4aaf6cc PB Purge Scoms if PBIEQ clock domain is being stopped
  • 68134ad6a585 Added Scom to de-assert EDRAM Charge Pumps in Power down sequence
  • ea1efc2a4755 SBE compile issue fix for p9_pm_pfet_control.C
  • 42a34c043502 Workaround to fix issue where Powerbus loses track of EQs in DD1

Ricardo Mata (1):

  • 23f9d13c49a4 p9_pcie_scominit PEC0 swap bit position fixed

Richard J. Knight (10):

  • 6e0b34872da1 OP820:OPRASGS:Garrison:Hostboot IPL fails to halt during shutdown reconfig
  • cf651cc5c92c Add check to verify SBE .ring section size
  • 1be6c479bcf8 Add sbeError tag to all SBE related error xml files
  • 35e9b44c6549 Add support for iterating over EC_LEVELS
  • 04f5ceb9bcad Update code to consolidate writes to same address in same putScom
  • 930ae804aaf3 Modify initCompiler to use FAPI_TRY in generated procedures
  • 575a7cc34655 Modify initCompiler to use template version of buffer insert
  • 3bae709a5e0c Data Storage exception during proc_check_slave_sbe_seeprom_complete
  • e72a22be4474 Updates to initcompiler to support DD2 and cumulus
  • fd9918895644 Update Evaluator to eliminate duplicate buffer inserts

Robert Lippert (2):

  • 28bfab63a269 i2c: only send 1 master stop in FORCE_UNLOCK reset mode
  • a9d19db49d56 sbe: flush PNOR sections after customization to free up memory

Ryan Black (1):

Sachin Gupta (1):

  • 5eb984b6ebed Solve compilation issues when FAPI_INF is disabled

Sangeetha T S (1):

  • 86ac03f63a62 Fix for the EKB build failure caused by hcd constant

Santosh Balasubramanian (2):

Shelton Leung (8):

Soma BhanuTej (2):

Stephen Cprek (8):

  • aff3f67b49b8 Add ROM code files in Hostboot
  • 6b650f542829 Compile ROM code within Hostboot
  • b83556b80737 Use common ROM header files for rom, bootloader, and hostboot
  • 2e898b1a6eb2 Verify HBB in HBBL using ROM code
  • 6c700217953d Put HW keys' hash in HBBL and extract that out to verify code
  • 6fcb35a68a93 Add securerom.bin as a CMVC file to checkin to HB releases
  • b90b803882cc Replace hardcodes with const variables in ROM.C
  • f0d7c809d23c Add SecureROM version info and Change SBE update to use max HBBL size

Stephen Glancy (9):

Sumit Kumar (2):

Sunil.Kumar (3):

Thi Tran (7):

  • 4ae130493df4 Fix p9_mss_eff_grouping for 2 ports/group
  • bb1d5af12d3c p9_mss_eff_grouping update group of 2
  • 39922dff9157 p9_mss_setup_bars - Updating Channel ID program value condition
  • 1ccb89df2fa6 Removing ATTR_PROC_FABRIC_ADDR_BAR_MODE
  • 0dbc28685354 p9_mss_setup_bars - Setup MCFIR mask
  • cf4f4a41086a Fix grouping_2groupsOf2_cross_MCS in p9_mss_eff_grouping
  • 3f50549be88e p9_revert_sbe_mcs_setup - Fix incorrect unmask reg addr

William A. Kennington III (5):

William G. Hoffa (1):

  • 9375e99c7a74 Revert "Sending Firmware progress sensor is now synchronous"

Yue Du (30):

  • d4da355f15b4 Istep4: clean up istep4 todo items and mark them with RTC
  • a34403166bcd CORE/CACHE: core/cache/l2_stopclocks Level 2
  • 574d48425f25 PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute defined
  • 079067b0c92b PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocks
  • caf33f14a39d CORE/CACHE: add Level1 cache/l2/core stopclocks procedures
  • f0400cbacd0b CORE/CACHE: core/cache/l2_stopclocks Level 2
  • fd704cf1b023 HB/IPL: ex_is_abomination workaround for hostboot
  • e8e8287ce9d9 PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocks
  • d3f906221098 cache/core/l2_stopclocks updates
  • 03c755de0396 Istep4: clean up istep4 todo items and mark them with RTC
  • 3109d56eadab cache/core/l2_stopclocks updates
  • 6b4f823e5bb5 Stopclocks: fix state checking return code being current_err
  • b0bc69aed66c HWP-CORE/CACHE: Update Istep 4 procedures regressed on model 34
  • c42dd4189605 HWP-CACHE/CORE:istep4 procedures updates
  • 7ca9c97b1772 HWP/LIB: add fencing to common poweronoff module
  • 8b39b84dce09 HWP/LIB: double delay timeout in p9_common_poweronoff.C
  • a4cb9de014e4 Cache HWP: DD1 VCS Workaround
  • 5429d9d9b40a PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocks
  • d2f8541b5122 HWP-CORE/CACHE: Update Istep 4 procedures regressed on model 34
  • 5aad2b5e8b54 HWP-CACHE/CORE:istep4 procedures updates
  • f04d1d5e551f Cache/Core: Istep4 procedure changes for model 9038 and above
  • 48a316361efa CORE/CACHE: add Level1 cache/l2/core stopclocks procedures
  • 468b30162ca9 CORE/CACHE: core/cache/l2_stopclocks Level 2
  • 1a1d55e8e15a Cache HWP: DD1 VCS Workaround
  • a35355750ef4 cache/core/l2_stopclocks updates
  • 8e10a9b2dfb0 Istep4: add enable auto special wakeup after core is up
  • 36168f2b4756 HB/IPL: ex_is_abomination workaround for hostboot
  • 8f238fc355f7 IPL/Stop: Assert ABIST_SRAM_MODE_DC to support ABIST Recovery
  • e9419b5ecfc4 STOP: update image build as epsilon settings updated via 36814
  • 9630c0f54dba Hcode: Create centralized memory map headers

Zane C. Shelley (1):

  • 080232abef20 Revert "MDIA: Bumped MDIA timeout value becasue of Nimbus DD1.0 workaround"

Zane Shelley (50):

  • 46a90faed300 PRD: force read all registers for markstore reads
  • d1e5423ee580 PRD: minor formatting bugs in trace and error log output
  • bf0eecf3d45a PRD: added support functions in MemSymbol class
  • 049679c48e1f PRD: Ported CE table from P8 to P9
  • 38aa7b996846 PRD: Error parser support for CE Table
  • 7839e4d09350 MDIA: Bumped MDIA timeout value becasue of Nimbus DD1.0 workaround
  • 7483710a8f4f MDIA: Bumped MDIA timeout value becasue of Nimbus DD1.0 workaround
  • 5330378cbd5d MDIA: temporarily disabled autonomic IPL in MDIA
  • 25b6f1b3afc1 PRD: PCI chiplet FIR SCOM errors when PCI not configured
  • 8ca944a7d893 PRD: error handling for PBCENTFIR[9]
  • 593259005e02 PRD: allow getTargetPosition() on SYS target
  • 41103661c9b1 PRD: Cleaned error handling for getAssociationType()
  • 8ece86143be0 PRD: added nullptr check to various functions in prdfTargetServices.C
  • aaacd79d799b PRD: cleaned error handling for getConnectedParent() functions
  • 0b0e9f9ab1be PRD: cleaned error path handling in various getConnected() functions
  • 97610753ce7d PRD: modified getTargetPosition() to assert if target is not supported
  • 4989910e6b08 PRD: cleaned CPU_WORD type and associated enums
  • b45d94fd8919 PRD: Cleaned BitString contructor and accessor functions
  • 500d4171608d PRD: cleaned BitStringBuffer class
  • a56b9bde18a2 PRD: cleaned BitString::Pattern()
  • 982dd4c4466b PRD: cleaned BitString::SetBits()
  • 48853801cd21 PRD: cleaned BitString::Mask()
  • bcccf4a71ae3 PRD: cleaned BitString::[GS]setField() functions
  • 7259e7a29c29 PRD: removed BitStringOffset class
  • 3192051cd7b4 PRD: clean various BitString functions
  • 80bee20908ee PRD: cleaned BitString operators
  • 80e0e704d501 PRD: prevent BitString copy/assignment from BitStringBuffer
  • a16072bf583c PRD: Removed BIT_STRING_CLASS alias
  • f0e78d113f81 PRD: removed BIT_STRING_BUFFER_CLASS alias
  • d9e448dfff08 PRD: updates from latest RAS spreadsheet (v85)
  • a4c70975fc02 PRD: rule file updates for MCA unit
  • 294bb92dbac6 PRD: MCBIST command address timeout error
  • 57d244f433c9 PRD: updates to TP_LFIR[21]
  • e27d2151a8be PRD: Fix to core recovery workaround
  • 005bc0cd6a94 PRD: MNFG thresholds for L2/L3 cache/directory CEs
  • 52306946f268 PRD: Nimbus DD1.0 workaround for cache CEs
  • a3fd64b53ed7 PRD: add BitString support to error log parsing code
  • 0de839164574 PRD: reduced error path on memory threshold functions
  • ee946e0c40f8 PRD: add support to read memory NCE/TCE symbols from hardware
  • 33f3061fdea9 PRD: add CE table to default capture data
  • 9906005c5829 PRD: Add plugins for NCE/TCE attentions
  • 88f1b330a084 PRD: move prdfMemThresholds.[CH] and prdfMemUtils.[CH] to common directory
  • 77bab0e1848c PRD: templatize MemCeTable class
  • f47866a84121 PRD: wrap MNFG thresholds into MemCeTable::addEntry()
  • c45b0ef78384 PRD: add MCA data bundle wrapper for MCBIST TdCtlr
  • 5555ba42e226 PRD: added support for memory NCE/TCE analysis
  • 979413b96252 PRD: IPL DRAM Repairs cleanup
  • 1ec713628b77 PRD: enabled analysis of MNFG CE statistics
  • 245717655c4f PRD: analysis for hard CEs during Memory Diagnostics
  • 7989df3da7bb PRD: Clear symbol marks when chip mark placed on same DRAM

crgeddes (3):

  • f62430eef704 Update p9_query_cache_access_state to use the correct scom register
  • 25aea1971749 Fix up interrupt init process for MPIPL
  • 28770d118338 Enable regular wakeup after a quad is powered off

dchowe (1):

  • 31e2b02c1561 p9.fbc.ioo_tl.scom.initfile update for nvlink

nagurram-in (3):

spashabk-in (1):

Package: occ

Repository

Patches

Commits

No changes.

Package: palmetto-xml

Repository

Patches

Commits

No changes.

Package: petitboot

Repository

Patches

Commits

Samuel Mendoza-Jonas (6):

  • 3d7ccc23cb49 discover/network: Search by UUID only if available
  • 0e2792afaf5a discover/network: Ensure interfaces have device before configuring
  • 58b86dca9e65 discover/network: Ignore interfaces with pre-existing MAC address
  • 6fab22db693a discover/device-handler: Process queue after device added
  • 75e892983190 discover/device-handler: Cancel pending boot on reinit
  • d94bb8c48f42 process: Cancel all asynchronous jobs on reinit

Package: pnor

Repository

Patches

Commits

Bill Hoffa (1):

  • 212f131cabeb Update 64kb Layout for the partitions to be 64k aligned

Dan Crowell (1):

Dean Sanner (1):

Madhavan Srinivasan (1):

  • d19c050bc79c Remove the ima_catalog binary file copy command from update_*.pl file

Prachi Gupta (1):

Package: skiboot

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No changes.

Package: witherspoon-xml

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Bill Hoffa (3):

Matt Spinler (5):

Oliver O'Halloran (1):

Prachi Gupta (3):

Sertac Cakici (1):

Package: zaius-xml

Repository

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Adrian Barrera (4):

Dean Sanner (1):

  • 0e382eb58082 Updates to allow powerbus/memory to run async

a-barrera (14):