alu
Here are 44 public repositories matching this topic...
"Repository containing a collection of Verilog code modules and test bench for digital design projects. "
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Apr 1, 2024 - Verilog
Implementation of an arithmetic and logic unit in Verilog for the Basys3 board (Digilent). Computer Architecture 2023. FCEFyN, UNC, Argentina
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Oct 13, 2023 - Verilog
Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
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Sep 15, 2023 - Verilog
Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my research and learning. See also the Hackaday.IO project. https://hackaday.io/project/166922-spam-1-8-bit-cpu
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Aug 27, 2023 - Verilog
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Mar 12, 2023 - Verilog
Harvard (separate memories for data and instructions), RISC-like, five-stages pipeline processor
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Jan 29, 2023 - Verilog
Verilog implementations of different simple tasks
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Oct 10, 2022 - Verilog
Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clock cycle will be used to load values into the registers. The second will be for performing the operations. 6-bit opcodes are used to select the fun…
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Jul 17, 2022 - Verilog
Simple 8-bit single-cycle processor which includes an ALU, a register file and control logic, using Verilog HDL
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Jul 8, 2022 - Verilog
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