alu
Here are 195 public repositories matching this topic...
This is an implementation of a simple CPU in Logisim and Verilog.
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Jan 11, 2019 - Verilog
Bachelor thesis about designing a 64-bit pipelined processor
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Feb 11, 2023 - TeX
VHDL(Verilog Hardware Description Language) is a programming language using which one can simulate hardware circuits
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Jul 30, 2020 - Verilog
ALU is the core of all operations, it elaborate two operands and performs logical and arithmetic operations based on the instruction passed to it by the CU.
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May 19, 2021 - VHDL
Repositório para o projeto challenge-one-portfolio-br da Alura em parceria com a Oracle
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Jun 25, 2022 - HTML
Solutions to the Nand2Tetris course on coursera.
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Aug 9, 2022 - Hack
In the repository I have implemented a ALU with Finite State machine with VHDL and Xilinx ISE 14.7 application. Also a BCD to seven segment have been implemented for input and output digits.
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Jul 5, 2023 - C
My homework for Technoatom C++ course
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Jun 28, 2017 - C++
An efficient multiplier and Accumulator (MAC) unit to do operations like multiplication & addition on numbers stored in RAM unit attached to it.
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Dec 5, 2018 - Verilog
A simple arithmetic logic unit (ALU) with System verilog
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Aug 21, 2020 - SystemVerilog
SUTD ISTD 2020 Computation Structures Electronic Hardware 1D Project
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Dec 1, 2023 - Python
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Mar 9, 2022 - VHDL
ALU capable of adding, subtracting, multiplying and calculating the remainder of two signed 3-bits numbers.
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Jul 27, 2022
Verilog implementations of different simple tasks
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Oct 10, 2022 - Verilog
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