Undertale developed with VerilogHDL on digilent basys3 (Xilinx Artix-7 FPGA Board)

Labwork on Logic Design implementation in Verilog on a Basys3 FPGA Module

Final Project for VLSI (EENG-483)

Hardware implementations using a Digilent Basys-3 FPGA board.

EE89H Final Project

A FPGA automated teller machine made for the Basys3.

EE2020 Digital Fundamentals @ NUS Engin

EECS207001

Board files for the sifive/freedom git to support other fpga plattforms

2021 Fall EECS-2070 by Prof. 李濬屹 Team37 with @schdoel

🔐 A simple alarm system using Diligent Basys MX3 Microcontroller

Two player game on the same monitor controlled by pushbuttons written in SystemVerilog

Generic VHDL models for Basys FPGA made on Vivado

Programming of vivado FPGAs

Snake Game for Basys3 FPGA

Procesador de 32 bits MIPS, operando a una frecuencia de 90.909 MHz con una arquitectura de 5 etapas. Fue desarrollado en Verilog para ser implementado en una FPGA Basys3.

Xilinx Vivado project for nanoprocessor designing with VHDL

Implementation of Texas Hold'em Poker on Verilog(Basys3 FGPA)

A FPGA implementation of Ben Eater's SAP-1 computer using the Digilent's BASYS 3 board.

CPU based using Verilog in Xilinx Vivado targeting the Basys3 FPGA Board