Here are
49 public repositories
matching this topic...
🐳 Return the time and info of the next bus for a giving bus-stop of the RTL.
Updated
May 21, 2024
Python
A Sublime Editor plugin that can display RTL content correctly
Updated
Jun 13, 2021
Python
Examples with HWToolkit (A Python-based hardware construction framework)
Updated
Mar 26, 2024
Python
Todos as minhas atividades durante o curso de desenvolvimento web full stack na Trybe
Updated
Aug 24, 2021
Python
An advanced Flask web application template
Updated
Jul 2, 2023
Python
Updated
May 10, 2024
Python
A Library of Python Utilities for RTL Design
Updated
Apr 11, 2024
Python
A synthesizer capable of transforming SVA properties into synthesizable hardware modules in Verilog register-transfer level (RTL).
Updated
Sep 23, 2023
Python
Updated
Mar 24, 2024
Python
Updated
May 8, 2024
Python
RTL layout parser supporting multiple columns for Google Cloud OCR JSON output
Updated
Dec 16, 2020
Python
Updated
Feb 19, 2024
Python
RASPI Transport Layer. This is the communication backbone for the RASPI project.
Updated
Aug 24, 2019
Python
RTL-like Simulation and Evaluation in Python
Updated
Nov 6, 2023
Python
Updated
Aug 19, 2022
Python
ATHEENA respository (including software and hardware artifacts for FCCM submission 2023)
Updated
Feb 15, 2024
Python
A collection of Python tools for micro-Electronics Design Automation.
Updated
Feb 11, 2024
Python
DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization
Updated
Jan 23, 2020
Python
An in-progress set of tools created to perform feature extraction and more on RTL files
Updated
Apr 30, 2024
Python
Updated
Mar 4, 2021
Python
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