This is my hobby project, which contain my rsic-v core and my convolutional layer with AMBA bus
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Updated
Jul 21, 2024 - Verilog
This is my hobby project, which contain my rsic-v core and my convolutional layer with AMBA bus
Verilog Mini Projects
A Thermostat controller designed using the temperature sensor on the Nexys-4 module
FSM: Sequence Detector using Verilog HDL
Verilog code and testbench for 4-bit full adder
Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device
Advanced encryption standard AES128 Encryption Implementation in verilog.
Diseño de un par controlador-periférico según el protocolo MDIO (cláusula 22)
A Control System for Washing Machine in Verilog HDL and DE10 Lite Board
I am trying to develop my skills through daily practice and consistency.
This repository contains a collection of small Verilog modules for various purposes.
Verilog HDL implementation of SDRAM controller and SDRAM model
Motion Estimation implementation by using Verilog HDL
It is a project on verilog which I had learned from a course taught by Prof. Indranil Sengupta at IIT Kharagpur.
implementation of a basic computer having ability to perform logic and arithmetic operations
A verilog program that keeps count of the number of cars enter a parking lot and how many spots are free. Code made in Verilog for AMD FPGA xc7s50csga324-1 boolean board
Repository for RTL building blocks #100daysofrtl VERILOG VHDL System Verilog
Transformer Bitnet en Verilog
Exploring both MATLAB and Vivado Verilog in designing a Direct Digital Synthesizer (DDS) system with a FIR low-pass filter. This project goes into digital system design, signal processing, and hardware implementation.
A dump for my VHDL projects, because I want to have a better understanding of Verilog and also Logic circuits.
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