Linux C application that displays encoder values. Start with a Vivado block design and then transition to writing the C application for Linux
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Updated
Jun 12, 2024 - VHDL
Linux C application that displays encoder values. Start with a Vivado block design and then transition to writing the C application for Linux
IP Block - Debouncer and AXI GPIO for the PmodENC
3 stage pipeline implementation of a digital circuit that calculates DIT FFT in 8 points. It is made as an AXI-Lite Slave IP in AMD Vivado. It is successfully implemented in a block design that contains a Microblaze processor as the Master, an AXI Interconnect as the Bridge and the AXI-Lite FFT IP as Slave.
FPU that does all the 4 fundamental arithmetic operations made as an AXI-Lite Slave IP in AMD Vivado. IEEE 754 was used. It can be successfully implemented on an Arty S7-50 FPGA board.
FPGA-based real-time audio spectrum analyzer.
N-bit Multiplier implementation in VHDL
FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)
ALICE Fast Interaction Trigger (FIT) FPGA code
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