Library files for Zynq MPSoC (64bit ARM CPU)

Human falls is a major reason for deaths in elderly people. It can be prevented by an automatic fall detection, and alert system. We have created an automatic fall detection algorithm running on the Xilinx ZCU104 FPGA.

A scalable multi-FPGA implementation of the boids model of flocking birds supported by a Python simulator

A Python program to determine the Grams per Square Meter of a Fabric using hardware accelerated Image Processing

Simple Tensor Addition Example with Xilinx SDAccel and CMake

This is a simulation based VHDL code developed in Xilinx to demonstrate a 4-bit PN sequence generator.

High level synthesis projects and practices

This is a brief written technical record for KriaPYNQ of Xilinx FPGA

High Level synthesis of data transfer in Vivado, Vivado HLS

Xilinx XC2064 modeling and simulation in SystemC

HLS moving average filter

Xilinx Vitis HLS 2022.2 bug sample

My personal project on arduino ,ESP8266, pi4

A circuit that helps create a single slope ADC for device such as PLDs

Xilinx Tools Tutorials

Handcrafted high resolution multichannel frequency counter 😉

FPGA Cryptography for High-Level Synthesis

A microprocessor implemented in VHDL

Hardware accelerated Julia set explorer running on Ultra96

Zynq Ultrascale+ MPSoC RPU examples