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A complete reference for programming the Texas Instruments TMS320C5x family
of 16-bit fixed-point digital signal processors, and for the c5xtools
toolchain (assembler, linker, hex/ROM converter and disassembler) that targets
them.
Everything here is cross-checked against the original Texas Instruments documentation listed in References. The two normative sources are:
- TMS320C5x User's Guide (TI literature number SPRU056D, 1998): architecture, registers, addressing modes and the instruction set.
- TMS320C1x/C2x/C2xx/C5x Assembly Language Tools User's Guide (SPRU018D, 1995): source syntax, directives, the macro language, COFF, the linker command language and the hex-conversion formats.
This wiki does not reproduce those manuals. It is an independent, plain-text explanation of the same facts, with every opcode, field width and register name verified against them.
The TMS320C5x is a 16-bit fixed-point DSP built around a 32-bit accumulator, a 16x16 hardware multiplier, eight auxiliary registers with their own address arithmetic unit, a hardware stack, and a 64K-word program space plus a 64K-word data space. It descends from the 'C1x/'C2x/'C2xx line and is largely upward compatible in source form with them.
A modern, dependency-free, clean-room implementation of the classic development flow, in portable C99:
| Tool | Role |
|---|---|
c5xasm |
assembler: source to a TI COFF object (or a flat word listing) |
c5xlnk |
linker: COFF objects to an absolute or relocatable image |
c5xhex |
converter: COFF to Intel-HEX / Motorola-S / TI-tagged / ASCII / bin |
c5xdis |
disassembler: image back to re-assemblable source (byte-exact) |
The output contract (COFF layout, instruction encodings, hex record formats) matches the TI tools described in SPRU018D.
The assembler and disassembler target the 'C5x; the linker and hex converter cover the wider 'C2x/'C2xx/'C5x COFF family. Compatibility with other TMS320 families is unverified - see Processor-family support.
The planned pages, in reading order:
- The processor
- Architecture Overview (buses, CPU, memory, peripherals)
- CPU and Registers (CALU, PLU, ARAU, accumulator, ST0/ST1, PMST)
- Program Control (PC, stack, conditional ops, RPT/RPTB, interrupts, reset)
- Addressing Modes (direct, indirect, immediate, dedicated-register, memory-mapped, circular)
- Memory and I/O (program/data/I-O spaces, memory-mapped registers)
- Writing assembly
- Assembler Syntax (source statement format, constants, symbols, expressions)
- Assembler Directives (full reference)
- Macro Language
- The instruction set
- Instruction Set (notation, functional grouping, and one section per instruction, all on one page, plus instruction timing (cycle classes))
- Building a program
- COFF and Sections
- Linker (MEMORY and SECTIONS command language)
- Hex Conversion (record formats, ROM width, byte order)
- The tools
- c5xtools vs the TI toolchain (options and compatibility notes)
- All pages are plain 7-bit ASCII.
- Numbers follow the assembler's own notation: a trailing
his hexadecimal (for example200h), a trailingbis binary, a leading#marks an immediate operand. - Bit 0 is the least significant bit. Word means a 16-bit word.
MIT - (c) 2026 Grzegorz Worona grzegorz@worona.pl. See LICENSE.
Start here
The TMS320C5x processor
Writing assembly
The instruction set
A: ABS ADCB ADD ADDB ADDC ADDH ADDI ADDK ADDS ADDT ADLK ADRK AND ANDB ANDI ANDK APAC APL APLI APLK
B: B BACC BACCD BANZ BANZD BBNZ BBZ BC BCND BCNDD BD BDDD BDSD BGEZ BGZ BIOZ BIT BITT BKDK BLDD BLDP BLEZ BLKD BLKP BLPD BLZ BNC BNV BNZ BPSD BSAR BV BZ
C: CALA CALAD CALL CALLD CC CCD CLRC CMPL CMPR CNFD CNFP CONF CPL CPLI CPLK CRGT CRLT
E: EHWBS EHWBT EINT EMPSD EMRET ESTOP ESTPD ETRAP EXAR
F: FORT
L: LAC LACB LACC LACI LACK LACL LACT LALK LAMM LAR LARK LARP LDP LDPI LDPK LMMR LPH LRLK LST LST0 LST1 LT LTA LTD LTP LTS
M: MAC MACD MADD MADS MAR MPY MPYA MPYI MPYK MPYS MPYU MRKL
O: OPL OPLI OPLK OR ORB ORI ORK OUT
R: RC RET RETC RETCD RETD RETE RETI RFSM RHM ROL ROLB ROR RORB ROVM RPT RPTB RPTI RPTK RPTR RPTZ RSXM RTC RTXM RXF
S: SACB SACH SACL SAMM SAR SATH SATL SBB SBBB SBLK SBRK SC SETC SFL SFLB SFR SFRB SFSM SHM SMMR SOVM SPAC SPH SPL SPLK SPM SQRA SQRS SST SST0 SST1 SSXM STC STXM SUB SUBB SUBC SUBH SUBI SUBK SUBS SUBT SWI SXF
X: XC XOR XORB XORI XORK XPL XPLI XPLK
Building a program
The tools
Normative sources: TI SPRU056D and SPRU018D (see References).
License: MIT - (c) 2026 Grzegorz Worona.