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Inference Software — Runtime, compiler, kernels, model execution, quantization, scheduling, and performance optimization for efficient LLM inference.
Architecture — System architecture, microarchitecture, accelerator datapaths, memory hierarchy, interfaces, and hardware design specifications.
RTL — SystemVerilog implementation, module hierarchy, coding standards, IP integration, and RTL development.
Verification — Functional verification, simulation infrastructure, testbenches, assertions, coverage analysis, and regression testing.
Physical Design — ASIC implementation including synthesis, floorplanning, power planning, place-and-route, timing closure, physical verification, and tapeout.