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Software Actuation Module Design Spec
Status: Draft Version: v.0.1.0 Associated Hardware Revision: Rev A Last Updated: 2026-04-26
The Actuation Module (AM) firmware is a small single-purpose bare-metal STM32 application for the
AM hardware defined in
[[design/Electronics/Actuation_Module/Design_Spec.md|Electronics-Actuation-Module-Design-Spec]].
It is not a general host coprocessor and it does not need a command protocol, field bus, or
persistent telemetry channel.
Its responsibilities are to:
- initialise the local AM hardware safely
- home the servo at power-up
- watch one host request input plus one local home-switch input
- generate one deterministic single-step servo cycle for each valid request
- expose simple local diagnostics on
PWR,HOMED, andACT
The selected controller is STMicroelectronics STM32G071K8T3TR. The firmware should use a simple cooperative main loop driven by a millisecond tick plus at least one hardware timer for servo PWM generation. An RTOS is unnecessary for Rev A.
The STM32 on the AM has three relevant boot / service paths:
-
Normal application boot
- Default path used in service
-
BOOT0remains LOW at reset release - The user firmware starts and performs the AM startup / homing sequence
-
SWD debug / programming path
- Accessed through J4 on the AM hardware
- Used for normal firmware flashing, debug, recovery, and bring-up
- This path does not depend on the UART header or button sequence
-
STM32 ROM UART bootloader path
- Accessed through J5 plus SW1 / SW2 on the AM hardware
- This bypasses the AM application firmware and enters the STM32's built-in ROM bootloader
- Use this only when an ad-hoc UART flashing path is desired or when SWD is unavailable
The user-facing UART bootloader sequence shall be documented and supported exactly as follows:
- Connect the UART adapter to J5:
- J5 pin 1 =
GND - J5 pin 2 =
3V3_ENIGreference - J5 pin 3 =
UART_TXfrom the AM - J5 pin 4 =
UART_RXinto the AM
- J5 pin 1 =
- Press and hold SW2 to assert
BOOT0 - Press and release SW1 to pulse
NRST - Release SW2 after reset
- The STM32 then remains in the ROM bootloader until the next reset or power cycle with
BOOT0LOW
Important behavior note: in user/operator terms, BOOT0 is a momentary action with a timing
constraint, not a latched mode switch. In electrical terms, the firmware design shall assume only
that BOOT0 must be valid at the STM32 boot-mode sample point during reset release.
The AM firmware shall implement this logical state machine:
| State | Entry condition | Outputs / actions | Exit condition |
|---|---|---|---|
BOOT_INIT |
MCU exits reset into user firmware | Configure clocks, GPIO, timer PWM, tick timer, and default-safe outputs; LED PWR=ON, HOMED=OFF, ACT=OFF
|
Initialization complete |
HOME_SEEK |
BOOT_INIT complete |
Drive servo toward the defined home direction / position until the home switch is detected or timeout expires | Home switch valid -> IDLE_HOMED; timeout/fault -> FAULT
|
IDLE_HOMED |
Successful homing | Servo held at home; PWR=ON, HOMED=ON, ACT=OFF; watch ACTUATE_REQUEST_N
|
Valid request edge -> ACTUATE_CYCLE
|
ACTUATE_CYCLE |
Request accepted | Latch one cycle, set ACT=ON, drive the servo through the programmed one-shot motion profile |
Cycle complete -> WAIT_FOR_RELEASE
|
WAIT_FOR_RELEASE |
Cycle complete | Return servo to home / idle position, ACT=OFF; ignore repeated triggers while request is still asserted |
Request released -> IDLE_HOMED
|
FAULT |
Home timeout, impossible input condition, or firmware-detected unrecoverable error | Motion output driven to safe idle; PWR=ON, HOMED=OFF, ACT indicates fault pattern if desired |
Reset or power cycle |
This state machine is intentionally conservative:
- no repeated actuation is permitted from a held-low request
- no host-side feedback wire is required
- no request is serviced before homing has completed
- any unsafe or ambiguous startup condition resolves to no motion
| Logical signal | Direction at MCU | Firmware use |
|---|---|---|
ACTUATE_REQUEST_N |
Input | Debounced / qualified active-low request from host; bias = STM32 internal pull-up (PUPDR = 0b01) configured by firmware - no external resistor fitted |
ACTUATION_HOME_N |
Input | Debounced active-low home confirmation |
SERVO_PWM |
Output | 50 Hz-class servo pulse train generated by timer hardware |
LED_PWR |
Output | ON whenever firmware has completed basic boot initialization |
LED_HOMED |
Output | ON only when the module is in a successfully homed ready state |
LED_ACT |
Output | ON during an accepted actuation cycle; optional blink pattern in FAULT
|
BOOT0 |
Service input | Not used during normal application runtime; only relevant at reset / ROM bootloader entry |
NRST |
Service input | External reset path via SW1 / J4 |
The exact STM32 pad mapping may still be finalized during schematic capture, but the firmware design shall preserve these logical roles exactly.
ACTUATE_REQUEST_Npull-up configuration: TheACTUATE_REQUEST_Npull-up is provided solely by the STM32 internal GPIO pull-up (PUPDR =0b01). No external pull-up resistor is fitted on the hardware - the internal pull-up is the authoritative pull-up source. The firmware shall enable the internal pull-up (PUPDR register =0b01) before the GPIO is sampled or the debounce routine starts.
At application boot, the firmware shall:
- start with servo output in a safe idle configuration
- wait a short stabilization interval for power and GPIO state to settle
- sample the home input with debounce / qualification
- if already home, declare success without unnecessary movement
- otherwise drive the servo in the homing direction until home is detected
- stop motion immediately once home is confirmed
- enter
FAULTif home is not reached within the defined timeout window
Implementation notes:
- The home-switch input should be digitally filtered rather than acted on from a single raw sample.
- The firmware should avoid continuous hunting around the home point.
- Rev A should prefer deterministic fixed timing and fixed pulse widths over adaptive or learning behavior.
Each accepted request shall produce exactly one cycle:
- detect a valid active-low request after debounce / qualification
- latch the request internally
- ignore further request changes until the cycle completes
- move the servo from home to the actuation position
- hold for the required dwell interval
- return the servo to the home / idle position
- require request release before a new cycle can be armed
The firmware shall treat ACTUATE_REQUEST_N as an edge-qualified one-shot trigger, not as a
continuous command input.
Rev A firmware should keep these values as named constants or a compact configuration structure:
| Parameter | Purpose |
|---|---|
startup_settle_ms |
Delay after reset before input qualification begins |
input_debounce_ms |
Digital qualification window for ACTUATE_REQUEST_N and ACTUATION_HOME_N
|
servo_pwm_period_us |
Servo PWM period, typically around 20 ms |
servo_home_pulse_us |
Timer compare value for home position |
servo_actuate_pulse_us |
Timer compare value for actuated position |
servo_travel_time_ms |
Time allowed for each movement leg |
servo_dwell_ms |
Hold time at the actuated position |
homing_timeout_ms |
Maximum time allowed for initial home acquisition |
These parameters do not need a runtime user interface in Rev A; compile-time constants are acceptable.
The firmware shall drive LEDs as follows:
| Condition | PWR |
HOMED |
ACT |
|---|---|---|---|
| MCU initialized, not yet homed | ON | OFF | OFF |
| Homed and ready | ON | ON | OFF |
| Active cycle in progress | ON | ON | ON |
| Fault / homing timeout | ON | OFF | Blink or steady ON per final implementation |
If a distinct fault blink pattern is used on ACT, it should be implemented in firmware with a
simple non-blocking tick-based pattern rather than delay loops.
For the first STM32 firmware revision, implement in this order:
- clock tree, GPIO defaults, and LED sanity test
- hardware timer PWM generation on
SERVO_PWM - input sampling / debounce for
ACTUATION_HOME_NandACTUATE_REQUEST_N - startup homing state machine
- one-shot actuation state machine
- fault handling and final LED behavior
- optional UART debug prints during bench bring-up only
The release firmware should not depend on a UART console being connected.
-
Design Log
- DEC-001 3v3-enig-used-throughout-3v3-system-removed-from-btb-interconnect
- DEC-002 poe-option-a2-selected-coilcraft-poe600f-12ld
- DEC-003 poe-output-12v-or-ing-priority-logic-required
- DEC-004 supercap-charge-current-05a-under-poe
- DEC-005 tps25980-efuse-replaces-tps259474l
- DEC-006 stusb4500-negotiates-15v5a-75w
- DEC-007 dual-interleaved-lmq61460-q1-5v-buck-12a
- DEC-008 tps25750-emulates-5v5a-pd-profile-to-cm5
- DEC-009 legacy-controller-probe-access-pin-14-reassigned-to-sw-led-ctrl
- DEC-010 inc-14-deferred-legacy-probe-access-esd-protection-post-prototype
- DEC-011 all-power-rails-on-power-module-3v3-enig-serves-rotor-stack
- DEC-012 u4-tps25750-replaced-with-tps25751drefr-nrnd-resolution
- DEC-013 l3-emi-inductor-changed-to-bourns-srp1265a-100m
- DEC-014 controller-board-uses-erf8-female-on-both-btb-connectors-for-blind-mate-assembly
- DEC-015 link-beta-connector-reduced-from-80-pin-to-40-pin-erf8-020-erm8-020
- DEC-016 jtag-controlled-impedance-and-series-termination
- DEC-017 minimum-4-layer-stackup-for-all-non-controller-boards
- DEC-018 connector-pinout-ownership-model
- DEC-019 poe-transformer-topology-acf-option-a-selected
- DEC-020 gnd-chassis-rib-clearway-enig-bond
- DEC-021 supercapacitor-bank-upgrade-2x2-2s2p-2x3-2s3p
- DEC-022 jdb-ft232h-clock-source-dedicated-12mhz-smd-crystal-selected
- DEC-023 jdb-gnd-chassis-omitted-mounting-holes-tied-to-gnd
- DEC-024 jdb-is-complete-jtag-master-controller-jtag-lines-are-pass-through
- DEC-025 cm5-shutdown-mechanism-hardware-driven-ltc3350-software-support-deferred
- DEC-026 rotor-position-encoder-as5600-replaced-with-single-track-capacitive-encoder
- DEC-027 rotor-position-readback-via-jtag-virtual-jtag-user0-udr
- DEC-028 split-dual-board-rotor-architecture
- DEC-029 supercapacitor-hold-up-specification-25f-abracon-cells-2s4p-20-s-at-15w
- DEC-030 5v-main-backup-switchover-transient-fix-r14-r30-c35
- DEC-031 cm5-virtual-keyboard-key-injection-feature-architecture
- DEC-032 settings-board-panel-mount-configuration-controls-with-cm5-override
- DEC-033 dsi1-display-connector-provision-for-optional-lid-touchscreen
- DEC-034 switch-hardware-refresh-settings-board-toggle-discrete-rgb-led-ruggedized-pm-sw1
- DEC-035 hid-keyboard-and-lightboard-use-a-40-position-qwerty-derived-layout-for-the-64-character-code-space
- DEC-036 link-beta-former-monitor-pins-reallocated-as-grouped-power-rails
- DEC-037 link-beta-pin-map-regrouped-around-dedicated-jtag-and-i2c-guard-bands
- DEC-038 controller-centric-dock-architecture-replaces-legacy-link-alpha-link-beta-backplane
- DEC-039 enclosure-connected-boards-use-gnd-chassis-daughterboards-are-exempt
- DEC-040 diagnostics-banks-removed-from-active-design-specs-pending-coupon-review
- DEC-041 encoder-modules-use-epm570-with-digital-debounce-and-role-by-programming
- DEC-042 encoder-port-pin-8-carries-hid-local-enc-active-n
- DEC-043 shared-actuation-module-replaces-direct-controller-servo-gpio
- DEC-044 fdc2114-internal-oscillator-selected-clkin-gnd
- DEC-045 rotor-samtec-erm8erf8-connectors-require-esd-protection
- DEC-046 bypassdecoupling-capacitor-voltage-rating-50v-retained-on-all-non-pm-boards
- DEC-047 or-ing-mosfet-corrected-to-csd17578q5a
- DEC-048 esd-protection-extended-to-host-side-rotor-facing-btb-connectors
- DEC-049 rotor-internal-headers-renamed-to-j-convention-connector-count-updated-to-8-bom-unified
- DEC-050 encoder-blade-terminal-refdes-corrected-from-bt-to-j-convention
- DEC-051 settings-board-renamed-to-user-settings-module-board-code-sbd-usm
- DEC-052 variant-specific-fdc2114-refdes-use-ab-suffix-convention
- DEC-053 extension-port-connector-upgraded-from-bhr-20-vua-20-pin-to-2bhr-30-vua-30-pin
- DEC-054 signal-net-renamed-pwr-but-pwr-but-n-active-low-suffix-conformance
- DEC-055 f-108-system-wide-reference-designator-and-requirement-id-consecutive-renumbering
- DEC-056 relocate-investigation-documents-to-board-owned-folders
- DEC-057 daughterboard-mounting-hole-specification-and-standoff-bom-ownership
- DEC-058 jdb-connector-upgrade-hat-headers-to-df40c-20-btb
- DEC-059 erm8erf8-stacking-height-confirmed-rotor-stack-assembly-specification-created
- DEC-060 jtag-daughterboard-renamed-to-jtag-module-jdb-prefix-replaced-with-jm
- DEC-061 pass-7-review-corrections-ctlstarotencamgrsstatus-updates
- DEC-062 ctl-poe-t1-selection-tdk-b82806d0060a120-topology-acf-flyback-acf-forward
- DEC-063 ctl-poe-l1-selection-yageo-pa4343333nlt-acf-forward-output-inductor
- DEC-064 ctl-poe-c17-final-part-selection-kemet-c0805c223k2racauto-22nf-200v-x7r-0805
- DEC-065 system-wide-stackup-code-correction-and-jlcpcb-authoritative-impedance-values
- DEC-066 grs-canonical-pcb-stackup-authority-consolidation
- DEC-067 am-sw1sw2-tactile-switch-rating-accepted-for-production
- DEC-068 pm-per-input-bulk-capacitors-and-output-source-quality-bulk-banks
- DEC-069 pm-per-input-polyfuse-protection-and-uvlo-resistor-recalculation
- DEC-070 mcp23017-i²c-silicon-restriction-gpb7gpa7-review-and-cfg-apply-n-reassignment
- DEC-071 usm-spdt-switch-dual-terminated-wiring-and-pull-down-resistor-removal
- DEC-072 review-pass-9-findings-and-resolutions
- DEC-073 ltc3350-rt-resistor-correction-332-kω-133-kω-amends-dec-030
- DEC-074 rename-cpld-reset-signal-sys-reset-n-cpld-reset-n
- DEC-075 tps25751-option-c-external-eeprom-isolated-i2ct-debug-header-on-power-module
- DEC-076 pm-3v3-architecture-redesign-3v3-main3v3-enig-rail-split-j4-dual-purpose-programming-j6-removal-and-q12-parallel-p-fet-selection
- DEC-077 retrospective-rotor-ttd-daisy-chain-no-series-termination-resistors-amends-dec-016
- DEC-078 cpld-reset-n-stator-buffer-bss138-n-channel-mosfet-new-decision-references-dec-077
- DEC-079 c20-voltage-rating-correction-25v-35v-amends-dec-072-bom-item-1
- DEC-080 retrospective-pm-and-stator-dock-connector-redesignation-amends-dec-038
- DEC-081 retrospective-rotor-ttd-no-series-resistor-policy-in-addition-to-dec-016
- DEC-082 10µf-bulk-reservoir-capacitor-upgrade-25v-0805-50v-1206-all-boards
- DEC-083 retire-all-boards-bomjson-consolidate-bom-authority-in-design-spec-files-and-consolidated-bom
- DEC-084 cypher-stack-architecture-migration-and-board-role-consolidation
- DEC-085 stack-output-j4-power-pin-zero-ohm-links-prototype-test
- DEC-086 cypher-input-common-variant-restructure-10-numeric-variant-single-i2c-address
- DEC-087 cypher-input-led-colour-architecture-moved-off-plain-bits-onto-local-rgb-select-circuit
- DEC-088 plugboard-jacks-wired-directly-to-cypher-board-spade-bank-j4j6-reserves-5v-main
- DEC-089 board-role-id-widened-to-4-bit-capability-bitmask-cpld-pin-freeing-and-j5-migration
- DEC-090 cypher-board-j3-stack-input-side-full-50-pin-allocation-and-actuate-request-in-out-n-signal-pair
- DEC-091 j3-esd-protection-extended-to-actuate-request-pins-and-actuation-gating-resolved-to-cypher-cpld
- DEC-092 cypher-board-j4-stack-output-side-full-50-pin-allocation
- DEC-093 actuate-request-end-to-end-signal-path-j4-rename-rotor-interposer-connectors-extended
- DEC-094 connector-ownership-reassignment-for-reused-chain-templates
- DEC-095 actuate-request-esd-protection-completed-stack-output-passive-wiring-defined
- DEC-096 stack-blanking-board-corrected-actuate-request-bridging-added
- DEC-097 cypher-j3-actuate-request-out-n-wired-as-round-trip-verification-input
- DEC-098 controller-cypher-dock-split-power-molex-signal-samtec-amends-dec-038-dec-080
- DEC-099 cm5-i2c-bank-architecture-mipi0-to-mipi1-swap-pwm-gpclk-reservation
- DEC-100 jtag-module-actuation-module-retirement-from-controller-board
- DEC-101 cypher-ina219-i2c-address-aligned-to-pm-default
- DEC-102 cypher-ft232h-3v3-vregin-self-powered-5v-usb-net-retired
- DEC-103 hid-usm-hub-connector-topology-rework
- DEC-104 user-settings-module-role-reworked-as-hid-colour-audio-hub-and-jtag-i2c-spine
- DEC-105 cfg-route-moved-to-full-cm5-software-control-physical-usm-switches-retired
- DEC-106 cypher-plugboard-reduced-to-mechanical-connector-only-board
- DEC-107 usm-hid-connector-four-colour-style-signal-expansion
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