Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples. https://www.chili-chips.xyz/open-cologne
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Updated
Oct 30, 2024 - Verilog
Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples. https://www.chili-chips.xyz/open-cologne
RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga
prototyping board for the GateMate FPGA evaluation board E1
EE education board for the GateMate FPGA evaluation board E1
EE education board for the GateMate FPGA evaluation board E1
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