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ram
Here are 11 public repositories matching this topic...
Digital Circuits made with VHDL
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Updated
Feb 8, 2024 - VHDL
Image Processing Toolbox in Verilog using Basys3 FPGA
python
fpga
ram
pixel
vhdl
image-processing
python3
verilog
convolution
vivado
motion-blur
verilog-hdl
basys3
digital-systems
hsync
basys
basys-board
coe
verilog-project
basys3-fpga
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Updated
Sep 19, 2023 - VHDL
VHDL codes for UART Interface; hardware communication protocol. contains Receiver & Transmitter units & RAM memory.
fpga
ram
memory
vhdl
uart
transmitter
uart-protocol
uart-interface
vhdl-code
digital-logic-design
reciver
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Updated
Jun 10, 2021 - VHDL
Some of small codes and implementation of modules in Computer Aided Design in VHDL by ActiveHDL
counter
ram
register
encoder
decoder
vhdl
assignment
cad
port
transport
inertial
reject
alu
dma
shift-register
seven-segment
7segment
7seg
moore-machine
moore
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Updated
Jun 3, 2018 - VHDL
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