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22 public repositories
matching this topic...
SPI master and SPI slave for FPGA written in VHDL
Updated
Apr 24, 2021
VHDL
Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.
An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
Various projects of SPI loader module for xilinx fpga
Updated
Jul 20, 2020
VHDL
🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).
Updated
Nov 29, 2021
VHDL
A Xilinx IP Core and App for line scanner image capture and store
Customizable multi chip select supporting Serial Peripheral Interface master.
Updated
Aug 31, 2021
VHDL
IP core for a simple SPI master with variable clock frequncy within AXI peripheral. Developed and tested on Zybo evaluation board (Zynq-7000 product family)
Updated
Jul 12, 2017
VHDL
LED Wall Screen Buffer and Panel Management Controller in VHDL
Master SPI Component written in VHDL to control an ADXL345 Accelerometer from a FPGA
SPI Master RTL on fpga. ESP32 was the slave. highly reliable, tested upto 10MHz and 512 bits for transaction length
Updated
Mar 14, 2022
VHDL
FPGA Digital Hardware Design
Updated
Feb 27, 2022
VHDL
Updated
May 22, 2019
VHDL
Nexys 4 DDR - Rom Controller
A Custom AXI4 SPI Peripheral
This is a digital hardware design of a simple version of SPI communication protocol using VHDL as the HDL.
Updated
Mar 16, 2023
VHDL
SPI implementation for FPGA.
Updated
Apr 25, 2022
VHDL
Analog Digital Three Wire SPI
Development of SPI Slave driver in VHDL and SPI Master driver for STM32 in C along with 8 bit CRC calculation module to ensure data integrity.
Updated
Jul 25, 2021
VHDL
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