Here are
30 public repositories
matching this topic...
Updated
May 29, 2023
SystemVerilog
FuseSoC-based SoC for VeeR EH1 and EL2
Updated
Aug 24, 2024
Verilog
Updated
Aug 23, 2024
SystemVerilog
FuseSoc Verification Automation
Updated
Jul 21, 2022
VHDL
Example of how to get started with olofk/fusesoc.
Updated
Jul 25, 2021
Python
Multi-port BRAM IP for ASIC and FPGA
Updated
Apr 21, 2021
SystemVerilog
Custom 6502 Video Game Console
Updated
Feb 3, 2024
SystemVerilog
This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board.
Updated
Aug 24, 2023
SystemVerilog
Simple example of how to get started with the Tang Nano with FuseSoC.
Updated
Mar 14, 2022
Makefile
Just a set of Dockerfiles and tools for FuseSoC
Updated
Nov 12, 2018
Dockerfile
A quick SPI BFM to assist in SPI device testing and development
Updated
Jan 15, 2024
SystemVerilog
6502 Arcade Machine by UCSB IEEE
Updated
Feb 13, 2022
JavaScript
Find first set operation in Verilog-2001 with logarithmic complexity.
Updated
Nov 1, 2021
Verilog
Updated
Nov 5, 2022
SystemVerilog
A set of common RTL cores that I've developed over time and organized into a FuseSoC library.
A simple SHA-256 implementation in VHDL and Verilog, simulated using a basic UVM testbench.
Updated
Oct 23, 2022
Verilog
Updated
Jun 28, 2020
SystemVerilog
A template for starting a Verilog project with FuseSoC integration, Icarus simulation, Verilator linting, Yosys usage report, and VS Code syntax highlighting.
Updated
Aug 2, 2023
Makefile
Updated
Nov 5, 2022
SystemVerilog
A simple test library for verilator
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