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Review of Guideline #45
aripod edited this page Jan 8, 2019
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10 revisions
Yes. It says HW designers and the guideline is really addressed to them as it deals with architecture implemented in the FPGA.
Even though brief, the guideline is very clear. The issue is well explained and the solution clear also.
Does the guideline explicitly refer to the handbook? To which part of the deliverable is it relevant (e.g., chapter of D1.2/D1.3)?
No.
Yes. The SDSoC demo.
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Guideline advice: just fine
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Insights that led to the guideline: Clear
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Recommended implementation method of the guideline along with a solid motivation for the recommendation: Clear
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Instantiation of the recommended implementation method in the reference platform: Yes
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Evaluation of the guideline in reference applications: Yes
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References: There is even a paper dealing with the problem.
TULIPP Guideline Wiki