Skip to content

Review of Guideline #45

aripod edited this page Jan 8, 2019 · 10 revisions

Formatting

| Item | Outcome | | --- | --- | | Guideline complies with the | Yes | | Name of guideline responsible with affiliation is clearly stated | Yes |

Is the audience of the guideline correctly specified?

Yes. It says HW designers and the guideline is really addressed to them as it deals with architecture implemented in the FPGA.

Is the expertise required to write the guideline correctly specified?

Yes

Are the keywords well selected?

I would add "data-flow" to the "partial reconfiguration".

Are parts of the guideline too generic or too specific?

Even though brief, the guideline is very clear. The issue is well explained and the solution clear also.

Does the guideline explicitly refer to the handbook? To which part of the deliverable is it relevant (e.g., chapter of D1.2/D1.3)?

No.

Does the guideline specify the work done in the project that can benefit from the guideline?

Yes. The SDSoC demo.

Other comments

  1. Guideline advice: just fine

  2. Insights that led to the guideline: Clear

  3. Recommended implementation method of the guideline along with a solid motivation for the recommendation: Clear

  4. Instantiation of the recommended implementation method in the reference platform: Yes

  5. Evaluation of the guideline in reference applications: Yes

  6. References: There is even a paper dealing with the problem.

Track changes:

  1. 07/01/2019: guideline reviewed.

  2. 08/01/2018: guideline updated.

Clone this wiki locally