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Review of Guideline #8

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philippemilletresearch edited this page Jul 30, 2018 · 5 revisions

Review of Guideline #8

Formatting

Item Outcome
Guideline complies with the Guideline-Template Yes
Name of guideline responsible with affiliation is clearly stated Yes

Is the audience of the guideline correctly specified?

The audience is currently Application developers and I think it really is. The guideline is about a software optimisation that one would like to also get implemented in FPGAs but which is not straight forward to implement.

Is the expertise required to write the guideline correctly specified?

The expertise is not specified. The expertise is FPGA developers, so it falls into the Application developers category.

Are the keywords well selected?

Yes, but we must also add the keyword FPGA.

Are parts of the guideline too generic or too specific?

The level of description is the right one. It can be applied anywhere and there is an example to show how to do it. The guideline can be seen as very generic but it will be very useful in image processing when a chain of filters have to be applied with conditions.

Does the guideline explicitly refer to the handbook? To which part of the deliverable is it relevant (e.g., chapter of D1.2/D1.3)?

No reference in the handbook.

Finding the right place is not easy because we don't actually have a section about optimisation in the book. One way could be to refer to chapter 5 that deals with performance analysis where we could add a sub-section about optimisation.

Does the guideline specify the work done in the project that can benefit from the guideline?

Yes, it explains it "will be used" in the ADAS use case. However, we must change this sentence into "we used it in the ADAS use case" and gained that much time, that much FPGA resources and that much energy consumption.

Other comments

  1. Guideline advice: Very clear, I would keep it the way it is.

  2. Insights that led to the guideline: Clear also. We can keep it the way it is.

  3. Recommended implementation method of the guideline along with a solid motivation for the recommendation: Also very clear. No change required.

  4. Instantiation of the recommended implementation method in the reference platform: We must explain better how it was used and where. As I understand it is only used in the application code. Could it be used in the toolchain as an optimization mechanism?

  5. Evaluation of the guideline in reference applications: The evaluation was not done, or is not written. The results must be given here. The guideline explains that it helps to get better performance, so we must show the performance benefits. It can be faster or consuming less power or using less FPGA resources or a bit of them all...

  6. References: There are no reference. It might not be necessary but if any reference can be made to another implementation example or a generic Xilinx paper...

Track changes:

  1. 30/07/2018: Made some formatting changes in the guidelines to cope with template.
  2. 30/07/2018: guideline reviewed.

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