How to interpret Interfaces of the Standard Library

apaj edited this page Sep 3, 2018 · 1 revision

Question

Chisel contains a Standard Library of Interfaces:

  1. DecoupledIO - a Bundle with a ready-valid interface
  2. ValidIO - a Bundle with a valid interface
  3. Queue - a Module providing a hardware Queue
  4. Pipe - a Module delaying input data
  5. Arbiter - a Module connecting multiple producers to one consumer

How are these interpreted in hardware? What do they synthesize to?

Answer

A full answer is still to be provided, but for now all the knowledge on this matter is collected within this StackOverflow question.

Please feel free to contribute, either here directly or by answering the mentioned question.

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