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Raul Cardenas Montoya edited this page Sep 19, 2026 · 12 revisions

synaptic-wiring

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SNN wiring, topology generation, and temporal delay infrastructure.

Area Capability
Topology Erdős–Rényi, Watts–Strogatz, Barabási–Albert, layered; deterministic digest
Delays Per-synapse DelayTicks + SpikeDelayBuffer
Mesh SynapticMesh::propagate / propagate_graded + allocation-free *_into variants
Sparse maps CSR SparseSynapticMap + builder
Router ChannelRouter / RouterConfig::validate / try_with_config
Wiring Dale's law polarity, distance-based rules

Mirrored from Devin DeepWiki (generated 2026-09-19, commit f9815a65, branch main) by Devin (Cognition) against main @ f9815a6. Source: Devin wiki

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Section What's inside
1. Overview The crate explicitly excludes neuron integration models (such as LIF or Izhikevich) and learning rules, leavin…
2. Core Runtime: SynapticMesh The SynapticMesh is the primary top-level orchestrator of the synaptic-wiring codebase, defined in [src/mesh.r…
3. Topology Subsystem The Topology Subsystem is responsible for constructing, validating, and representing the structural graph of s…
4. Sparse Maps and Channel Routing The sparse maps and channel routing subsystem provides an optional, self-contained routing fabric and memory-e…
5. Testing, Benchmarks and Quality Gates The synaptic-wiring codebase relies on a multi-tiered validation architecture encompassing contract tests, pro…
6. Build, CI and Project Tooling For deep technical details, see the child pages: - Cargo Manifest, Profiles and Dependencies — Cargo.toml prof…
7. Glossary This page provides formal technical definitions and implementation pointers for domain-specific concepts, arch…
Full index — 26 pages

Last updated: 2026-09-18 Updated by: Devin (Cognition) Package tip reference: f9815a6 (main)

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