#

altera

Here are 13 public repositories matching this topic...

olofk / edalize

An abstraction library for interfacing EDA tools

Updated Nov 18, 2024
Python

PyFPGA / pyfpga

A Python package to use FPGA development tools programmatically.

Updated Nov 12, 2024
Python

suoto / vim-hdl

Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

productivity vhdl vim-plugins verilog xilinx syntastic syntax-checker altera systemverilog modelsim

Updated Jun 1, 2021
Python

tomverbeure / intel_jtag_uart

A Python module to interact with an Intel JTAG UART

python fpga intel uart altera jtag jtag-atlantic

Updated May 8, 2021
Python

amaranth-farm / fpga-mandelbrot

FPGA mandelbrot accelerator via high speed/super speed USB

fpga usb fractal mandelbrot xilinx altera hdl fractal-images usb3 fractal-algorithms fractals fractal-rendering terasic usb2 kintex

Updated Apr 6, 2023
Python

Django2FPGAdemo

robseb / Django2FPGAdemo

Demonstration how to build a Management Web interface to interact with the FPGA fabric and change the FPGA configuration with the Django Framework

django django-framework adc altera sensor-data cyclone-v de10nano intel-fpga de10-nano de10-standard fpga-configuration soc-fpga fpga-data fpga-fabric rsyocto

Updated Jun 27, 2021
Python

Paebbels / pyIPCMI

A Python-based IP Core Management Infrastructure.

infrastructure database simulation vhdl intel python3 xilinx synthesis altera modelsim questasim xilinx-vivado quartus-prime vhdl-verification ip-core riviera-pro

Updated Apr 29, 2021
Python

MichaelBenvenuto / PLDude

A command line utility to generate bitstreams and various programming files easily for PLDs

python vhdl verilog build-tool xilinx altera fpga-programming

Updated Jul 18, 2022
Python

akaeba / mifgen

MIF convertor

memory intel altera mif bin2mif

Updated Jan 14, 2024
Python

wyvernSemi / lm32fpga

FPGA development board (DE1) targetted lm32 based systems design for Verilog

cpu fpga python3 cyclone verilog altera modelsim latticemico32 quartus

Updated Sep 10, 2017
Python

jvmcarneiro / de2-115-virtual-input

Virtual GUI for controlling the Altera DE2-115 board.

arduino fpga verilog altera de2-115 quartus

Updated Aug 16, 2021
Python

wangshankun / yocto-angstrom-altera-a10

altera a10 opensource angstrom socfpga

altera yocto uio

Updated Oct 12, 2017
Python

TanumaHideki / ReLM-PoC

ReLM is the soft-core multiprocessor technology based on the unique memory architecture, enabling users to build a high-performance microcontroller on a relatively small FPGA board.

game python fpga multiprocessing parallel parallel-computing verilog altera parallel-processing multiprocessor softcore altera-fpga relm register-less bubble-estate

Updated Nov 18, 2024
Python

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