Chisel: A Modern Hardware Design Language

Flexible Intermediate Representation for RTL

high-performance RTL simulator

Provides dot visualizations of chisel/firrtl circuits

educational microarchitectures for risc-v isa

A fault-injection framework using Chisel and FIRRTL

Chisel library for Unum Type-III Posit Arithmetic

Chisel Things for OFDM

Implementation of the Advanced Encryption Standard in Chisel

Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL. To know more, please read the paper that appeared in MICRO 2021 by Bera et al. (https://arxiv.org/pdf/2109.12021.pdf).

BOOM's Simulation Accelerator.

Split large FIRRTL into separated modules for incremental compilation.

A set of FIRRTL transforms for obfuscating circuits