A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw
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Updated
Sep 26, 2022 - C
A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw
Partial implementation of Knuth's MMIX processor (FPGA softcore)
A SoC implementation of a PDP-8/I for the PiDP-8/I console
DE10-Nano FPGA Configuration from Linux. Software to configure the FPGA portion of the Cyclone V SoC.
Matrix multiplication on multiple Nios II cores
Very simple Cortex-M1 SoC design based on ARM DesignStart
Final Project third-perspective-shooting video game PokeHead and some other lab codes and design of ECE385 Digital Systems Laboratory
Altera wrappers for C applications using Altera's 16550 UART Core through Avalon Bus on Cyclone V.
The published IEEE paper tells about the basic details of this project
Audio Sampler for Zybo
HOMeR: Hardware Optical Music Recognition is a combination of a MATLAB app and an FPGA/SoC synthesizer capable of reading and replaying digitized sheet music images.
Coursework of NTHU CS512000 VLSI System Design
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