IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
-
Updated
Nov 29, 2020 - VHDL
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a Chip (SoC or SoFPGA).
A list of VHDL codes implementing cryptographic algorithms
FPGA based frequnecy counter hard- and software repository
VHDL Guide
NEANDER - A basic theorical computer
Advanced Computer Architecture at EPFL.
Design & Verification of IP Cores and ICs, Artificial Intelligence
This Repository contains custom-defined (AUBIE) processor components as defined by the ModelSimPE VHDL([Very High Speed Integrated Circuit] Hardware Description Language) Simulation Environment
Hardware design project of the FIX and TCP/IP offload engines on FPGA, containing HDL codes and Python codes for testing.
A digital design implementation of a FIFO memory circuit using VHDL simulated in Quartus.
Laboratories of 'Microelectronic Systems' course at PoliTo
Two Address Instructions (16bit) CPU
An attempt of creating faster multiplication circuit with HDL VHDL
Deluxe RISC processor
This repository consists of basic VHDL codes intended for a brief revision.
Five stages pipeline-processor CMP Core i(-1)
A repo to host research contributions for summer 2017
A VHDL implementation of a RISC-V model processor
Add a description, image, and links to the hardware-designs topic page so that developers can more easily learn about it.
To associate your repository with the hardware-designs topic, visit your repo's landing page and select "manage topics."