Python tools for generating and testing SPICE netlists/waveforms involving crossbar memory arrays in various configurations

Assignment of Microelectronic Circuits using HSPICE to simulate some of CMOS gates logics.

东南大学计算机学院《VLSI系统导论》课程实验

Latch and Flip Flop Analysis Using Hspice

Hpice Projects including DRAM, SRAM, High-Frequency Divider and Manchester Adder.

A parallel-prefix adder implemented using Ling’s transformation.

This frequency divider is able to divide the clock signal depending on 3-bit input signal. Also, we were required to draw block diagrams to represent the structure, use “laker” to layout, use another software to simulate the different after doing layout, and analyze delay and power consumption.

We were required to design a "fully differential OpAmp" with some analysis, including open-loop gain ones and closed-loop ones in common-mode and differential-mode. Moreover, we simulated it with DC sweep, AC response, response with step, in order to obtain the waveform and check whether our design achieved the specification.

USC EE577A/577B related codes

This is a novel application of active analog circuits for computing the Cartesian coordinates of points ( targets ) in 2D and 3D space. Two anchors ( points ) are assumed available, with known coordinates. Optical or Infrared Angle-of-Arrival , AOA, (noisy) measurements from each anchor to the uknown target are assumed available.

UT VLSI CA1

Implementation of 2-bit & 8-bit CMOS microelectronic circuit simulations in HSpice

2-to-1 Decoder implemented using cmos, pseudo-nmos and dynamic logic