Simple 8-bit UART realization on Verilog HDL.

Generic FPGA SDRAM controller, originally made for AS4C4M16SA

Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)

Test for video output using the ADV7513 chip on a de10 nano board

A 32-bit MIPS processor used Altera Quartus II with Verilog.

FFT algorithm for fpga

USB2.0 Verilog

A verilog HDL based project to control a servomotor with voice commands from an android phone.

fpga verilog risc-v rv32i cpu

2019年UPC应用物理专业《数字电子技术课程设计》任务内容：数字时钟设计

Simple verilog project with ability to connect to GPS module using UART and parse NMEA coordinates using finite state machine

Projekat iz Arhitekture Racunara (AR-a)

Simple LED blink example for DE2-115

HDL project of Matrix Processing Unit for FPGA devices.

This is a template for projects using the Quartus Prime suite with the DE10-Lite FPGA board.

A simple processor designed using Verilog and Altera DE1 development board.

実機貸出有！【オンライン】FPGA回路をリモートで書換→壮大なLチカ！インテルFPGAハンズオン#1 https://algyan.connpass.com/event/185328/presentation/

Ping Pong game on an FPGA in Verilog using HDMI

Implementation of ARM968E-S processor for Computer Architecture Lab [Spring 2024]