Here are
17 public repositories
matching this topic...
Traces, schematics, and general infos about custom chips reverse-engineered from silicon
Updated
Nov 7, 2024
Verilog
Many peripherals in Verilog ready to use
Updated
Oct 26, 2024
Verilog
Improved design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface
Updated
Aug 10, 2024
Verilog
Design files for the open-hardware NeoGeo MVS to AES converter
Updated
Jun 26, 2024
Verilog
Адаптер PS/2 клавиатуры для ZX Spectrum совместимых компьютеров на CPLD
Updated
Jun 19, 2024
Verilog
Replacement "chips" for NeoGeo systems
Updated
May 28, 2024
Verilog
Mod kit for the Virtual Boy to make it output VGA or RGB video
Updated
Oct 23, 2023
Verilog
Converts I2S to TDA1540 input format
Updated
Apr 26, 2023
Verilog
A simple text-mode VGA CRTC implemented in Verilog
Updated
Mar 25, 2022
Verilog
Complex Programmable Logic Device (CPLD) Guide
Updated
Jan 9, 2022
Verilog
Addressable 8 SPDT debouncer in Verilog
Updated
Jun 28, 2020
Verilog
24-bit Stereo Audio DAC for Raspberry Pi
Updated
Jan 27, 2020
Verilog
Play and learn some valuable lessons with a generic Ebay/China CPLD board featuring an Altera/Intel MAX II CPLD. The hardware is pretty crappy (just mine?) so it won't be much fun.
Updated
Sep 18, 2019
Verilog
A SPI master interface core for CPLD/FPGA
Updated
Oct 8, 2018
Verilog
Updated
Jul 19, 2018
Verilog
Initial design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface
Updated
Feb 20, 2018
Verilog
Porting TD4 (Toriaezu Dousasurudakeno 4bit-CPU) to CPLD
Updated
Jan 6, 2017
Verilog
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