A FPGA friendly 32 bit RISC-V CPU implementation
Assembly
Updated May 1, 2019
#
cpu
Repositories 667
A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
Assembly
Updated Feb 25, 2019
OSX 10.13.2, CVE-2017-5753, Spectre, PoC, C, ASM for OSX, MAC, Intel Arch, Proof of Concept, Hopper.App Output
poc
osx
intel
cpu
debug
hopper-disassembler
debugger-visualizer
control-flow-graph
c
exploit
spectre
security-vulnerability
assembly
Assembly
Updated Jan 6, 2018
Our final big homework, 32-bit CPU(microprogram) in Proteus.
Assembly
Updated Feb 21, 2019
An analog clock skin with equalizer.
rainmeter
rainmeter-skin
equalizer
ram
cpu
analog-clock-skin
music
spotify
itunes
skin
media-player
spotify-plugin
Assembly
Updated Jan 7, 2019
Svarog Miner is the first vDinar compatible miner made to work on its protocol and structure. This mining software is…
Assembly
Updated Feb 14, 2019
a 32-bit MIPS instruction set CPU's design and realization based on Logisim Platform
Assembly
Updated Feb 18, 2017
Simple processor based on RISC-V
Assembly
Updated Jul 19, 2017
CPU (Central Processing Unit) - SEE README for detailed description and pictures of the CPU main, and some parts of t…
Assembly
Updated Jan 20, 2018
Assembly
Updated May 4, 2019
Computer Systems Organization
Assembly
Updated Apr 24, 2016
This repository contains HWs and material from the nand to tetris course
Assembly
Updated Oct 16, 2017
A 16-bit computer built from scratch from a single NAND gate
Assembly
Updated Jan 31, 2019
Build a Modern Computer from First Principles: From Nand to Tetris
nand2tetris
nand2tetris-assignments
coursera
hardware
cpu
electrical-engineering
computer-systems
assembly
Assembly
Updated Dec 10, 2017
Final project from my computer organization class
Assembly
Updated Jun 25, 2018
RISC-V ISA implementation in System Verilog.
Assembly
Updated Aug 1, 2018